{"title":"每vc排队ATM交换机的小区损耗分析","authors":"P. Zhou, O. Yang","doi":"10.1109/CCECE.1998.682728","DOIUrl":null,"url":null,"abstract":"Conventional ATM switches are usually port-oriented and they are designed to operate in the context of FIFO queueing. New ATM switches that are currently being developed will be traffic oriented. They will provide per-VC queueing and therefore they handle each traffic flow or connection separately. This paper presents the cell loss evaluation on a per-VC queueing architecture proposed by the authors.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Cell loss analysis of per-VC queueing ATM switches\",\"authors\":\"P. Zhou, O. Yang\",\"doi\":\"10.1109/CCECE.1998.682728\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Conventional ATM switches are usually port-oriented and they are designed to operate in the context of FIFO queueing. New ATM switches that are currently being developed will be traffic oriented. They will provide per-VC queueing and therefore they handle each traffic flow or connection separately. This paper presents the cell loss evaluation on a per-VC queueing architecture proposed by the authors.\",\"PeriodicalId\":177613,\"journal\":{\"name\":\"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CCECE.1998.682728\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCECE.1998.682728","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cell loss analysis of per-VC queueing ATM switches
Conventional ATM switches are usually port-oriented and they are designed to operate in the context of FIFO queueing. New ATM switches that are currently being developed will be traffic oriented. They will provide per-VC queueing and therefore they handle each traffic flow or connection separately. This paper presents the cell loss evaluation on a per-VC queueing architecture proposed by the authors.