多芯片封装中芯片间I/O包路由的信令分析

K. Yong, W. Song, B. E. Cheah, M. F. Ain
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引用次数: 10

摘要

多芯片封装(MCP)正在成为许多高性能和先进电子器件的惯常集成形式。该技术的广泛采用主要得益于其优势,例如较低的功耗,多种硅工艺技术和制造商的异构集成,较短的上市时间和较低的成本[1]。然而,封装内高密度片间I/O路由在加上高运行数据速率时,会带来独特的信号挑战。本文重点研究了MCP中硅器件之间的片间I/O封装路由的信令分析。在本研究中,在2.5GHz至7.5GHz范围内对高电平信号质量和眼缘灵敏度进行了评估。发现微波效应在传输线分量中占主导地位,导致信号质量恶化。关键的限制因素,如串扰耦合效应、信号反射和导致信号质量下降的频率相关损耗,根据工作频率和通道长度进行了识别和分类,以供未来的MCP设计考虑。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Signaling analysis of inter-chip I/O package routing for Multi-Chip Package
Multi-Chip Package (MCP) is becoming a customary form of integration in many high performance and advanced electronic devices. The vast adoptions of this technology are mainly contributed by advantages for instance lower power consumption, heterogeneous integration of multiple silicon process technologies and manufacturers, shorter time-to-market and lower costs [1]. However, the high density interchip I/O routing within package presents unique signaling challenges when coupled with high operating data rate. This paper focuses on the signaling analysis of the inter-chip I/O package routing between silicon devices in MCP. In this study, high level signal quality and eye margin sensitivity were evaluated from 2.5GHz up-to 7.5GHz. The microwave effect is found dominating the transmission line component that resulted in signal quality deteriorations. Key limiting factors such as crosstalk coupling effects, signal reflections and frequency dependent losses that caused signal quality degradations were identified and categorized according to the operating frequency and channel length for future MCP design considerations.
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