{"title":"创新的半导体封装凹凸超细线衬底","authors":"Nozomi Shimoishizka, Takahiro Nakano, K. Hirata","doi":"10.1109/CSTIC.2015.7153435","DOIUrl":null,"url":null,"abstract":"A new ultra fine line substrate with bumps for semiconductor package has been developed in the present study, making it possible to realize 10um pitch line that has been impossible by conventional method. By making bumps and lines at same time through imprinting method, the technology is more suitable for high pin count flip chip bonding substrate. This paper will describe the detail of this ultra fine line substrate with bumps, the fine line imprint process, design rules, and the simulation results of electrical characteristic in DC and high frequency range.","PeriodicalId":130108,"journal":{"name":"2015 China Semiconductor Technology International Conference","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Innovative ultra fine line substrate with bump for semiconductor package\",\"authors\":\"Nozomi Shimoishizka, Takahiro Nakano, K. Hirata\",\"doi\":\"10.1109/CSTIC.2015.7153435\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new ultra fine line substrate with bumps for semiconductor package has been developed in the present study, making it possible to realize 10um pitch line that has been impossible by conventional method. By making bumps and lines at same time through imprinting method, the technology is more suitable for high pin count flip chip bonding substrate. This paper will describe the detail of this ultra fine line substrate with bumps, the fine line imprint process, design rules, and the simulation results of electrical characteristic in DC and high frequency range.\",\"PeriodicalId\":130108,\"journal\":{\"name\":\"2015 China Semiconductor Technology International Conference\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 China Semiconductor Technology International Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC.2015.7153435\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 China Semiconductor Technology International Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC.2015.7153435","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Innovative ultra fine line substrate with bump for semiconductor package
A new ultra fine line substrate with bumps for semiconductor package has been developed in the present study, making it possible to realize 10um pitch line that has been impossible by conventional method. By making bumps and lines at same time through imprinting method, the technology is more suitable for high pin count flip chip bonding substrate. This paper will describe the detail of this ultra fine line substrate with bumps, the fine line imprint process, design rules, and the simulation results of electrical characteristic in DC and high frequency range.
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