{"title":"H-tree CMOS逻辑电路","authors":"Shun-Wen Cheng","doi":"10.1109/ICECS.2008.4674910","DOIUrl":null,"url":null,"abstract":"Programmable routing networks and configurable logic blocks (CLB) achieve configurable computing of nowadays. This study proposed a novel H-tree configurable circuit. The 10-transistor (5P5N) CMOS version H-tree logic gate can generate AOI22, OAI22, AOI21, OAI21, NAND3, NAND2, NOR3, NOR2 and INV functions. A classic 8-to-1 multiplexer-based logic module needs 36 transistors to implement these functions; even an Actelpsilas ACT 1 logic module also needs 24 transistors to cover the job. Both the transistor count and layout cost of the proposed configurable gate are smaller than any other logic cell in FPGA/CPLD. The configurable logic gate could work with the existing logic cells to increase gate utilization and integration.","PeriodicalId":404629,"journal":{"name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","volume":"221 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"H-tree CMOS logic circuit\",\"authors\":\"Shun-Wen Cheng\",\"doi\":\"10.1109/ICECS.2008.4674910\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Programmable routing networks and configurable logic blocks (CLB) achieve configurable computing of nowadays. This study proposed a novel H-tree configurable circuit. The 10-transistor (5P5N) CMOS version H-tree logic gate can generate AOI22, OAI22, AOI21, OAI21, NAND3, NAND2, NOR3, NOR2 and INV functions. A classic 8-to-1 multiplexer-based logic module needs 36 transistors to implement these functions; even an Actelpsilas ACT 1 logic module also needs 24 transistors to cover the job. Both the transistor count and layout cost of the proposed configurable gate are smaller than any other logic cell in FPGA/CPLD. The configurable logic gate could work with the existing logic cells to increase gate utilization and integration.\",\"PeriodicalId\":404629,\"journal\":{\"name\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"volume\":\"221 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2008.4674910\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2008.4674910","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Programmable routing networks and configurable logic blocks (CLB) achieve configurable computing of nowadays. This study proposed a novel H-tree configurable circuit. The 10-transistor (5P5N) CMOS version H-tree logic gate can generate AOI22, OAI22, AOI21, OAI21, NAND3, NAND2, NOR3, NOR2 and INV functions. A classic 8-to-1 multiplexer-based logic module needs 36 transistors to implement these functions; even an Actelpsilas ACT 1 logic module also needs 24 transistors to cover the job. Both the transistor count and layout cost of the proposed configurable gate are smaller than any other logic cell in FPGA/CPLD. The configurable logic gate could work with the existing logic cells to increase gate utilization and integration.