{"title":"超流水线控制和数据路径合成","authors":"U. Prabhu, B. Pangrle","doi":"10.1109/DAC.1992.227807","DOIUrl":null,"url":null,"abstract":"The authors describe a superpipelined control and data path synthesis system. The system can handle pipelined modules in the data path, perform functional pipelining in the data path, and schedule the data path using a pipelined controller. Three control styles-serial, parallel, and pipelined-were implemented. The system automatically picks one depending on the data path, the clock frequency, and the functional unit and control path delays. The results showed that using a modifiable clock cycle time and a parameterized control style can significantly improve the throughput of high-performance systems.<<ETX>>","PeriodicalId":162648,"journal":{"name":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Superpipelined control and data path synthesis\",\"authors\":\"U. Prabhu, B. Pangrle\",\"doi\":\"10.1109/DAC.1992.227807\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors describe a superpipelined control and data path synthesis system. The system can handle pipelined modules in the data path, perform functional pipelining in the data path, and schedule the data path using a pipelined controller. Three control styles-serial, parallel, and pipelined-were implemented. The system automatically picks one depending on the data path, the clock frequency, and the functional unit and control path delays. The results showed that using a modifiable clock cycle time and a parameterized control style can significantly improve the throughput of high-performance systems.<<ETX>>\",\"PeriodicalId\":162648,\"journal\":{\"name\":\"[1992] Proceedings 29th ACM/IEEE Design Automation Conference\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1992] Proceedings 29th ACM/IEEE Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1992.227807\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1992.227807","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The authors describe a superpipelined control and data path synthesis system. The system can handle pipelined modules in the data path, perform functional pipelining in the data path, and schedule the data path using a pipelined controller. Three control styles-serial, parallel, and pipelined-were implemented. The system automatically picks one depending on the data path, the clock frequency, and the functional unit and control path delays. The results showed that using a modifiable clock cycle time and a parameterized control style can significantly improve the throughput of high-performance systems.<>