GALS微架构的独立前端和后端动态电压缩放

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI:10.1145/1165573.1165586

G. Magklis, P. Chaparro, José González, Antonio González

{"title":"GALS微架构的独立前端和后端动态电压缩放","authors":"G. Magklis, P. Chaparro, José González, Antonio González","doi":"10.1145/1165573.1165586","DOIUrl":null,"url":null,"abstract":"In recent years, globally asynchronous locally synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically, and independently, the voltage and frequency of the front-end and back-end domains of a novel two-domain microprocessor. We evaluate our mechanisms for both internal and external voltage regulators, and we present optimal dynamic voltage scaling results for the proposed microarchitecture. Our schemes achieve average improvement of 12% of the energy-delay metric, when using internal voltage regulators","PeriodicalId":119229,"journal":{"name":"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Independent Front-end and Back-end Dynamic Voltage Scaling for a GALS Microarchitecture\",\"authors\":\"G. Magklis, P. Chaparro, José González, Antonio González\",\"doi\":\"10.1145/1165573.1165586\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In recent years, globally asynchronous locally synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically, and independently, the voltage and frequency of the front-end and back-end domains of a novel two-domain microprocessor. We evaluate our mechanisms for both internal and external voltage regulators, and we present optimal dynamic voltage scaling results for the proposed microarchitecture. Our schemes achieve average improvement of 12% of the energy-delay metric, when using internal voltage regulators\",\"PeriodicalId\":119229,\"journal\":{\"name\":\"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1165573.1165586\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1165573.1165586","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 29

摘要

近年来，全球异步本地同步(GALS)设计和动态电压缩放(DVS)已经成为解决不断增加的微处理器能耗的一些最流行的方法。在这项工作中，我们提出了两种在线算法来动态地、独立地调整一种新型双域微处理器的前端和后端域的电压和频率。我们评估了内部和外部电压调节器的机制，并为所提出的微架构提供了最佳的动态电压缩放结果。当使用内部电压调节器时，我们的方案平均提高了12%的能量延迟度量

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Independent Front-end and Back-end Dynamic Voltage Scaling for a GALS Microarchitecture

In recent years, globally asynchronous locally synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically, and independently, the voltage and frequency of the front-end and back-end domains of a novel two-domain microprocessor. We evaluate our mechanisms for both internal and external voltage regulators, and we present optimal dynamic voltage scaling results for the proposed microarchitecture. Our schemes achieve average improvement of 12% of the energy-delay metric, when using internal voltage regulators

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design

自引率

0.00%

发文量