V. Jousseaume, J. Buckley, Y. Bernard, P. Gonon, C. Vallée, M. Mougenot, H. Feldis, S. Minoret, G. Chamiot-Maitral, A. Persico, A. Zenasni, M. Gely, J. Barnes, E. Martinez, H. Grampeix, C. Guedj, J. Nodin, B. De Salvo
{"title":"电阻式存储器的后端集成方法","authors":"V. Jousseaume, J. Buckley, Y. Bernard, P. Gonon, C. Vallée, M. Mougenot, H. Feldis, S. Minoret, G. Chamiot-Maitral, A. Persico, A. Zenasni, M. Gely, J. Barnes, E. Martinez, H. Grampeix, C. Guedj, J. Nodin, B. De Salvo","doi":"10.1109/IITC.2009.5090335","DOIUrl":null,"url":null,"abstract":"This work deals with the development of resistive memories based on oxides and their integration into the interconnection levels. The paper is focused on the screening of different dielectric oxides (metallic or not) showing resistive switching properties in order to lead to the highest performance resistive memories. Nickel oxide which is the most studied material in the literature is compared to other binary metallic oxides. In parallel, cells with silicon based dielectrics and Cu electrodes were developed. Electrical results allowed a comparison between the 3 main mechanisms observed in resistive memories based on oxides. Moreover, a specific resist flowing process and ion beam etching were optimized in order to limit metallic residues on memory cell side walls and prevent short-circuiting.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Back-end-of-line integration approaches for resistive memories\",\"authors\":\"V. Jousseaume, J. Buckley, Y. Bernard, P. Gonon, C. Vallée, M. Mougenot, H. Feldis, S. Minoret, G. Chamiot-Maitral, A. Persico, A. Zenasni, M. Gely, J. Barnes, E. Martinez, H. Grampeix, C. Guedj, J. Nodin, B. De Salvo\",\"doi\":\"10.1109/IITC.2009.5090335\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work deals with the development of resistive memories based on oxides and their integration into the interconnection levels. The paper is focused on the screening of different dielectric oxides (metallic or not) showing resistive switching properties in order to lead to the highest performance resistive memories. Nickel oxide which is the most studied material in the literature is compared to other binary metallic oxides. In parallel, cells with silicon based dielectrics and Cu electrodes were developed. Electrical results allowed a comparison between the 3 main mechanisms observed in resistive memories based on oxides. Moreover, a specific resist flowing process and ion beam etching were optimized in order to limit metallic residues on memory cell side walls and prevent short-circuiting.\",\"PeriodicalId\":301012,\"journal\":{\"name\":\"2009 IEEE International Interconnect Technology Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International Interconnect Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC.2009.5090335\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Interconnect Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2009.5090335","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Back-end-of-line integration approaches for resistive memories
This work deals with the development of resistive memories based on oxides and their integration into the interconnection levels. The paper is focused on the screening of different dielectric oxides (metallic or not) showing resistive switching properties in order to lead to the highest performance resistive memories. Nickel oxide which is the most studied material in the literature is compared to other binary metallic oxides. In parallel, cells with silicon based dielectrics and Cu electrodes were developed. Electrical results allowed a comparison between the 3 main mechanisms observed in resistive memories based on oxides. Moreover, a specific resist flowing process and ion beam etching were optimized in order to limit metallic residues on memory cell side walls and prevent short-circuiting.