{"title":"单片机支持锁频环的VCDRO稳频","authors":"P. Manojlovic, V. Smiljakovic, S. Jovanovic","doi":"10.1109/TELSKS.2007.4376097","DOIUrl":null,"url":null,"abstract":"The paper presents frequency stabilization of a VCDRO operating at 11 GHz by using a frequency lock loop supported by microcontroller. The signal from a PLL synthesizer is used as a reference signal in the FLL in order to obtain a signal with characteristics like one originating from a free- running VCDRO having, in the same time, stability close to a signal from PLL. The two signals are compared at 40 MHz band where a IF filter is designed in order to limit a stability difference between a VCDRO and PLL. A control signal within the FLL loop is realized with microcontroller that ensures a very stable operation over a wide temperature range. The signal obtained in the presented way meets the desired stability with very low level of spurious signals and meets all requirements for LO signals in modern microwave systems.","PeriodicalId":350740,"journal":{"name":"2007 8th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Frequency Stabilization of a VCDRO by Microcontroller Supported Frequency Lock Loop\",\"authors\":\"P. Manojlovic, V. Smiljakovic, S. Jovanovic\",\"doi\":\"10.1109/TELSKS.2007.4376097\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents frequency stabilization of a VCDRO operating at 11 GHz by using a frequency lock loop supported by microcontroller. The signal from a PLL synthesizer is used as a reference signal in the FLL in order to obtain a signal with characteristics like one originating from a free- running VCDRO having, in the same time, stability close to a signal from PLL. The two signals are compared at 40 MHz band where a IF filter is designed in order to limit a stability difference between a VCDRO and PLL. A control signal within the FLL loop is realized with microcontroller that ensures a very stable operation over a wide temperature range. The signal obtained in the presented way meets the desired stability with very low level of spurious signals and meets all requirements for LO signals in modern microwave systems.\",\"PeriodicalId\":350740,\"journal\":{\"name\":\"2007 8th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 8th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TELSKS.2007.4376097\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 8th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TELSKS.2007.4376097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Frequency Stabilization of a VCDRO by Microcontroller Supported Frequency Lock Loop
The paper presents frequency stabilization of a VCDRO operating at 11 GHz by using a frequency lock loop supported by microcontroller. The signal from a PLL synthesizer is used as a reference signal in the FLL in order to obtain a signal with characteristics like one originating from a free- running VCDRO having, in the same time, stability close to a signal from PLL. The two signals are compared at 40 MHz band where a IF filter is designed in order to limit a stability difference between a VCDRO and PLL. A control signal within the FLL loop is realized with microcontroller that ensures a very stable operation over a wide temperature range. The signal obtained in the presented way meets the desired stability with very low level of spurious signals and meets all requirements for LO signals in modern microwave systems.