时序电路测试生成的代数方法

[1991] Proceedings. First Great Lakes Symposium on VLSI Pub Date : 1991-03-01 DOI:10.1109/GLSV.1991.143952

A. Lioy, E. Macii, A. Meo, M. Reorda

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引用次数: 0

摘要

提出了一种时序电路测试图自动生成的代数算法。为了减少模式生成所需的计算时间，引入了三个创新概念。它们是:首先，无扇出区域的电路划分;然后，计算状态传播和证明的可观测性和激发性函数;最后，为决策树的每个节点分配可观察性和兴奋性阶数，以便快速检测每个故障的测试模式。

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An algebraic approach to test generation for sequential circuits

The authors describe an algebraic algorithm for automatic test pattern generation for sequential circuits. Three innovative concepts have been introduced in order to reduce the computational time required for pattern generation. These are: firstly, circuit partitioning in fanout-free regions; then, computation of observability and excitability functions for state propagation and justification; and finally, assignment of an observability and an excitability order to each node of the decision tree, for fast test pattern detection of each fault.<>

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[1991] Proceedings. First Great Lakes Symposium on VLSI

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