单片像素探测器FD-SOI技术研究进展

2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC) Pub Date : 2012-10-01 DOI:10.1109/NSSMIC.2012.6551151

M. Okihara, H. Kasai, N. Miura, N. Kuriyama, Y. Nagatomo, T. Hatsui, M. Omodani, T. Miyoshi, Y. Arai

{"title":"单片像素探测器FD-SOI技术研究进展","authors":"M. Okihara, H. Kasai, N. Miura, N. Kuriyama, Y. Nagatomo, T. Hatsui, M. Omodani, T. Miyoshi, Y. Arai","doi":"10.1109/NSSMIC.2012.6551151","DOIUrl":null,"url":null,"abstract":"We have been developing the 0.2 μm fully-depleted Silicon On Insulator (SOl) CMOS technology for monolithic pixel detectors. In order to improve the sensor's sensitivity, 8 inch FZ wafer is introduced for handle substrate in SO! wafer. Stitching technology is also developed to get large detector chip area. Furthermore, nested well structure for the p-n junction and double-SOI structure are investigating for reducing the radiation damage and crosstalk between electrical circuitry in top silicon layer and sensors at substrate. In this document, recent progress of process technology for pixel detector is described.","PeriodicalId":187728,"journal":{"name":"2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Progress of FD-SOI technology for monolithic pixel detectors\",\"authors\":\"M. Okihara, H. Kasai, N. Miura, N. Kuriyama, Y. Nagatomo, T. Hatsui, M. Omodani, T. Miyoshi, Y. Arai\",\"doi\":\"10.1109/NSSMIC.2012.6551151\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have been developing the 0.2 μm fully-depleted Silicon On Insulator (SOl) CMOS technology for monolithic pixel detectors. In order to improve the sensor's sensitivity, 8 inch FZ wafer is introduced for handle substrate in SO! wafer. Stitching technology is also developed to get large detector chip area. Furthermore, nested well structure for the p-n junction and double-SOI structure are investigating for reducing the radiation damage and crosstalk between electrical circuitry in top silicon layer and sensors at substrate. In this document, recent progress of process technology for pixel detector is described.\",\"PeriodicalId\":187728,\"journal\":{\"name\":\"2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)\",\"volume\":\"80 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NSSMIC.2012.6551151\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSSMIC.2012.6551151","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 15

摘要

我们一直在开发用于单片像素探测器的0.2 μm全耗尽绝缘体上硅(SOl) CMOS技术。为了提高传感器的灵敏度，采用8英寸FZ晶圆作为处理基板。晶片。为了获得更大的检测器芯片面积，还开发了拼接技术。此外，还研究了p-n结的嵌套井结构和双soi结构，以减少顶部硅层电路和衬底传感器之间的辐射损伤和串扰。本文介绍了近年来像素探测器工艺技术的研究进展。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Progress of FD-SOI technology for monolithic pixel detectors

We have been developing the 0.2 μm fully-depleted Silicon On Insulator (SOl) CMOS technology for monolithic pixel detectors. In order to improve the sensor's sensitivity, 8 inch FZ wafer is introduced for handle substrate in SO! wafer. Stitching technology is also developed to get large detector chip area. Furthermore, nested well structure for the p-n junction and double-SOI structure are investigating for reducing the radiation damage and crosstalk between electrical circuitry in top silicon layer and sensors at substrate. In this document, recent progress of process technology for pixel detector is described.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)

自引率

0.00%

发文量