{"title":"用溅射法在Si(111)衬底上外延gd2o3以实现低成本SOI","authors":"K. R. K. Amlta, A. Laha, S. Mahapatra, U. Gangway","doi":"10.1109/DRC.2018.8442170","DOIUrl":null,"url":null,"abstract":"Silicon on insulator (SOI) enables RF technology at advanced nodes [1]. The SOI-wafer cost is the key challenge due to complex manufacturing processes such as “smart cut” or wafer bonding [2]. The epitaxial growth of rare earth (RE) oxides followed by epi-Si growth is extensively explored for SOI stack preparation. Low lattice mismatch (~0.5%) between Si and RE oxides such as Ce<inf>2</inf>O<inf>3</inf>, Pr<inf>2</inf>0<inf>3</inf>, Gd<inf>2</inf>0<inf>3</inf> etc. [3], make it suitable for isolation oxide (IO) for SOI. Among all, Gd<inf>2</inf>0<inf>3</inf> is proven most promising, due to stable oxidation state (+3) [3], large band gap (~5.9 eV) and, sufficient band offset <tex>$(\\Delta \\mathrm{E}_{\\mathrm{c}}=2.1\\mathrm{eV}\\&\\Delta \\mathrm{E}_{\\mathrm{v}}=2.8\\mathrm{eV})$</tex> [4]. Epi-Gd<inf>2</inf>0<inf>3</inf> has potential to be an attractive alternative for gate dielectric and IO layer [5]–[8] in advanced CMOS technology.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"81 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Epitaxial Gd2O3on Si (111) Substrate by Sputtering to Enable Low Cost SOI\",\"authors\":\"K. R. K. Amlta, A. Laha, S. Mahapatra, U. Gangway\",\"doi\":\"10.1109/DRC.2018.8442170\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Silicon on insulator (SOI) enables RF technology at advanced nodes [1]. The SOI-wafer cost is the key challenge due to complex manufacturing processes such as “smart cut” or wafer bonding [2]. The epitaxial growth of rare earth (RE) oxides followed by epi-Si growth is extensively explored for SOI stack preparation. Low lattice mismatch (~0.5%) between Si and RE oxides such as Ce<inf>2</inf>O<inf>3</inf>, Pr<inf>2</inf>0<inf>3</inf>, Gd<inf>2</inf>0<inf>3</inf> etc. [3], make it suitable for isolation oxide (IO) for SOI. Among all, Gd<inf>2</inf>0<inf>3</inf> is proven most promising, due to stable oxidation state (+3) [3], large band gap (~5.9 eV) and, sufficient band offset <tex>$(\\\\Delta \\\\mathrm{E}_{\\\\mathrm{c}}=2.1\\\\mathrm{eV}\\\\&\\\\Delta \\\\mathrm{E}_{\\\\mathrm{v}}=2.8\\\\mathrm{eV})$</tex> [4]. Epi-Gd<inf>2</inf>0<inf>3</inf> has potential to be an attractive alternative for gate dielectric and IO layer [5]–[8] in advanced CMOS technology.\",\"PeriodicalId\":269641,\"journal\":{\"name\":\"2018 76th Device Research Conference (DRC)\",\"volume\":\"81 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 76th Device Research Conference (DRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2018.8442170\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 76th Device Research Conference (DRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2018.8442170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Epitaxial Gd2O3on Si (111) Substrate by Sputtering to Enable Low Cost SOI
Silicon on insulator (SOI) enables RF technology at advanced nodes [1]. The SOI-wafer cost is the key challenge due to complex manufacturing processes such as “smart cut” or wafer bonding [2]. The epitaxial growth of rare earth (RE) oxides followed by epi-Si growth is extensively explored for SOI stack preparation. Low lattice mismatch (~0.5%) between Si and RE oxides such as Ce2O3, Pr203, Gd203 etc. [3], make it suitable for isolation oxide (IO) for SOI. Among all, Gd203 is proven most promising, due to stable oxidation state (+3) [3], large band gap (~5.9 eV) and, sufficient band offset $(\Delta \mathrm{E}_{\mathrm{c}}=2.1\mathrm{eV}\&\Delta \mathrm{E}_{\mathrm{v}}=2.8\mathrm{eV})$ [4]. Epi-Gd203 has potential to be an attractive alternative for gate dielectric and IO layer [5]–[8] in advanced CMOS technology.