最小化测试周期数的算法

[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design Pub Date : 1991-01-04 DOI:10.1109/ISVD.1991.185109

A. Diwan

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引用次数: 3

摘要

用于测试VLSI电路的扫描路径方法使用移位寄存器来存储测试向量，并且通过每次移位一个新模式来应用一系列测试模式。本文提出了一种算法来找到测试模式应该应用的顺序，以便最小化所需移位操作的数量。该算法在一定条件下是最优的

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An algorithm for minimising the number of test cycles

The scan-path method for testing a VLSI circuit uses a shift register to store the test vectors, and a sequence of test patterns is applied by shifting in new patterns one bit at a time. This paper presents an algorithm to find the order in which the test patterns should be applied in order to minimise the number of shift operations required. The algorithm can be shown to be optimal under certain conditions.<>

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[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design

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