{"title":"一个0.13/spl mu/m / 1Gb/s/通道的片上存储转发网络","authors":"F. Mondinelli, M. Borgatti, Z. Kovács-Vajna","doi":"10.1109/SOCC.2004.1362381","DOIUrl":null,"url":null,"abstract":"A parametric packed-switched scalable network on chip allows energy/throughput/latency tradeoff for data-intensive communication-centric systems. At a clock rate of 200MHz the network guarantees block-free average 1 Gb/s per channel. The test chip includes 64-interfaces network on chip and traffic generators.","PeriodicalId":184894,"journal":{"name":"IEEE International SOC Conference, 2004. Proceedings.","volume":"121 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A 0.13/spl mu/m 1Gb/s/channel store-and-forward network on-chip\",\"authors\":\"F. Mondinelli, M. Borgatti, Z. Kovács-Vajna\",\"doi\":\"10.1109/SOCC.2004.1362381\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A parametric packed-switched scalable network on chip allows energy/throughput/latency tradeoff for data-intensive communication-centric systems. At a clock rate of 200MHz the network guarantees block-free average 1 Gb/s per channel. The test chip includes 64-interfaces network on chip and traffic generators.\",\"PeriodicalId\":184894,\"journal\":{\"name\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"volume\":\"121 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2004.1362381\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International SOC Conference, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2004.1362381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.13/spl mu/m 1Gb/s/channel store-and-forward network on-chip
A parametric packed-switched scalable network on chip allows energy/throughput/latency tradeoff for data-intensive communication-centric systems. At a clock rate of 200MHz the network guarantees block-free average 1 Gb/s per channel. The test chip includes 64-interfaces network on chip and traffic generators.
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