老化对22nm高k/金属栅三栅CMOS中8T 1R1W SRAM阵列多米诺骨牌读、静态写和保持的FMAX/VMIN和噪声裕度影响

2017 Symposium on VLSI Circuits Pub Date : 2017-06-01 DOI:10.23919/VLSIC.2017.8008571

Jaydeep P. Kulkami, Carlos Tokunaga, M. Cho, M. Khellah, J. Tschanz, V. De

{"title":"老化对22nm高k/金属栅三栅CMOS中8T 1R1W SRAM阵列多米诺骨牌读、静态写和保持的FMAX/VMIN和噪声裕度影响","authors":"Jaydeep P. Kulkami, Carlos Tokunaga, M. Cho, M. Khellah, J. Tschanz, V. De","doi":"10.23919/VLSIC.2017.8008571","DOIUrl":null,"url":null,"abstract":"Progressive impacts of aging on Fmax & noise margin of the precharge-evaluate domino read, and VMIN for differential static write & retention are demonstrated via statistical measurements over the operational lifetime of a 14KB 1R1W 8T SRAM array in 22nm high-k/metal-gate tri-gate CMOS.","PeriodicalId":176340,"journal":{"name":"2017 Symposium on VLSI Circuits","volume":"317 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"FMAX/VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS\",\"authors\":\"Jaydeep P. Kulkami, Carlos Tokunaga, M. Cho, M. Khellah, J. Tschanz, V. De\",\"doi\":\"10.23919/VLSIC.2017.8008571\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Progressive impacts of aging on Fmax & noise margin of the precharge-evaluate domino read, and VMIN for differential static write & retention are demonstrated via statistical measurements over the operational lifetime of a 14KB 1R1W 8T SRAM array in 22nm high-k/metal-gate tri-gate CMOS.\",\"PeriodicalId\":176340,\"journal\":{\"name\":\"2017 Symposium on VLSI Circuits\",\"volume\":\"317 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSIC.2017.8008571\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2017.8008571","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

在22nm高k/金属门三栅CMOS中，通过对14KB 1R1W 8T SRAM阵列的工作寿命进行统计测量，证明了老化对预充电评估多米诺读取的Fmax和噪声裕度的渐进影响，以及差分静态写入和保留的VMIN。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

FMAX/VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS

Progressive impacts of aging on Fmax & noise margin of the precharge-evaluate domino read, and VMIN for differential static write & retention are demonstrated via statistical measurements over the operational lifetime of a 14KB 1R1W 8T SRAM array in 22nm high-k/metal-gate tri-gate CMOS.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2017 Symposium on VLSI Circuits

自引率

0.00%

发文量