{"title":"基于多值逻辑的D/A变换器新型/spl Pi/型电阻网络","authors":"Xunwei Wu, Xuanchang Zhou","doi":"10.1109/ISMVL.2000.848624","DOIUrl":null,"url":null,"abstract":"The paper analyses the mathematical expression of digital-to-analog conversion and explains the physical realization of a binary DAC by means of dividing current, whereby the resistor network of the quaternary DAC is proposed. By using quaternary signal decode, a novel /spl Pi/-type resistor network is derived. Compared with the conventional T-type resistor network, a quarter of resistors in this network can be saved and the precision is ensured.","PeriodicalId":334235,"journal":{"name":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Novel /spl Pi/-type resistor network in D/A converter based on multiple-valued logic\",\"authors\":\"Xunwei Wu, Xuanchang Zhou\",\"doi\":\"10.1109/ISMVL.2000.848624\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper analyses the mathematical expression of digital-to-analog conversion and explains the physical realization of a binary DAC by means of dividing current, whereby the resistor network of the quaternary DAC is proposed. By using quaternary signal decode, a novel /spl Pi/-type resistor network is derived. Compared with the conventional T-type resistor network, a quarter of resistors in this network can be saved and the precision is ensured.\",\"PeriodicalId\":334235,\"journal\":{\"name\":\"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2000.848624\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2000.848624","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Novel /spl Pi/-type resistor network in D/A converter based on multiple-valued logic
The paper analyses the mathematical expression of digital-to-analog conversion and explains the physical realization of a binary DAC by means of dividing current, whereby the resistor network of the quaternary DAC is proposed. By using quaternary signal decode, a novel /spl Pi/-type resistor network is derived. Compared with the conventional T-type resistor network, a quarter of resistors in this network can be saved and the precision is ensured.