{"title":"一种实时图像处理芯片组","authors":"P. Ruetz, R. Brodersen","doi":"10.1109/ISSCC.1986.1157001","DOIUrl":null,"url":null,"abstract":"The development of ICs for a 3×3 linear convolver and non-linear post processors, a 7×7 logic convolver, lookup tables, a contour tracer and line delays, used in realtime image processing at 10MHz, will be discussed. Implementation was in 4μm NMOS.","PeriodicalId":440688,"journal":{"name":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A realtime image processing chip set\",\"authors\":\"P. Ruetz, R. Brodersen\",\"doi\":\"10.1109/ISSCC.1986.1157001\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The development of ICs for a 3×3 linear convolver and non-linear post processors, a 7×7 logic convolver, lookup tables, a contour tracer and line delays, used in realtime image processing at 10MHz, will be discussed. Implementation was in 4μm NMOS.\",\"PeriodicalId\":440688,\"journal\":{\"name\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1986.1157001\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1986.1157001","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The development of ICs for a 3×3 linear convolver and non-linear post processors, a 7×7 logic convolver, lookup tables, a contour tracer and line delays, used in realtime image processing at 10MHz, will be discussed. Implementation was in 4μm NMOS.