用于超宽带应用的4位闪存adc的改进低功耗低压CMOS比较器

2007 14th International Conference on Mixed Design of Integrated Circuits and Systems Pub Date : 2007-06-21 DOI:10.1109/MIXDES.2007.4286170

J. Oliveira, J. Goes, N. Paulino, J. Fernandes

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引用次数: 8

摘要

在本文中，我们提出了一种新的比较器结构，用于提高能源效率的低分辨率超高速adc。在该比较器中，利用MOS器件的无源放大能力，将预放大嵌入到输入开关电容网络中。仿真结果表明，该比较器具有低偏移超快再生时间和高能效的特点。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Improved Low-Power Low-Voltage CMOS Comparator for 4-Bit Flash ADCS for UWB Applications

In this paper we propose a novel comparator structure, to be used in low-resolution ultra-high-speed ADCs that improve the energy-efficiency. In this comparator, the pre-amplification is embedded in the input switched-capacitor network by using the passive-amplification capability of MOS devices. Simulated results show that this comparator exhibits low-offset ultra-fast regeneration-time and high energy-efficiency.

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2007 14th International Conference on Mixed Design of Integrated Circuits and Systems

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