Kazuki Kuribayashi, K. Machida, Y. Toyama, T. Waho
{"title":"时域多位Delta\\Sigma模数转换器","authors":"Kazuki Kuribayashi, K. Machida, Y. Toyama, T. Waho","doi":"10.1109/ISMVL.2011.31","DOIUrl":null,"url":null,"abstract":"A multi-bit representation in the time domain has been applied to a Delta\\Sigma analog-to-digital converter (ADC), which consists of an asynchronous Delta\\Sigma modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-µ m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"240 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Time-Domain Multi-bit Delta\\\\Sigma Analog-to-Digital Converter\",\"authors\":\"Kazuki Kuribayashi, K. Machida, Y. Toyama, T. Waho\",\"doi\":\"10.1109/ISMVL.2011.31\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multi-bit representation in the time domain has been applied to a Delta\\\\Sigma analog-to-digital converter (ADC), which consists of an asynchronous Delta\\\\Sigma modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-µ m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.\",\"PeriodicalId\":234611,\"journal\":{\"name\":\"2011 41st IEEE International Symposium on Multiple-Valued Logic\",\"volume\":\"240 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 41st IEEE International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2011.31\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 41st IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2011.31","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multi-bit representation in the time domain has been applied to a Delta\Sigma analog-to-digital converter (ADC), which consists of an asynchronous Delta\Sigma modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-µ m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.
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