F. Devos, C. Taillefer, C. Wang, M. Ahmad, M. Swamy
{"title":"CMOS电流分压器","authors":"F. Devos, C. Taillefer, C. Wang, M. Ahmad, M. Swamy","doi":"10.1109/MMICA.1999.833578","DOIUrl":null,"url":null,"abstract":"In this article, a simple circuit is proposed to implement the division of one current by another. This circuit is composed of two MOS transistors, a voltage comparator, and two capacitors. The divider operates well in a weak current range. Using a 1.5 /spl mu/m single-poly CMOS technology, the proposed circuit occupies a silicon area of approximately 30 /spl mu/m/spl times/40 /spl mu/m.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A CMOS current divider\",\"authors\":\"F. Devos, C. Taillefer, C. Wang, M. Ahmad, M. Swamy\",\"doi\":\"10.1109/MMICA.1999.833578\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this article, a simple circuit is proposed to implement the division of one current by another. This circuit is composed of two MOS transistors, a voltage comparator, and two capacitors. The divider operates well in a weak current range. Using a 1.5 /spl mu/m single-poly CMOS technology, the proposed circuit occupies a silicon area of approximately 30 /spl mu/m/spl times/40 /spl mu/m.\",\"PeriodicalId\":221297,\"journal\":{\"name\":\"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-07-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MMICA.1999.833578\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MMICA.1999.833578","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this article, a simple circuit is proposed to implement the division of one current by another. This circuit is composed of two MOS transistors, a voltage comparator, and two capacitors. The divider operates well in a weak current range. Using a 1.5 /spl mu/m single-poly CMOS technology, the proposed circuit occupies a silicon area of approximately 30 /spl mu/m/spl times/40 /spl mu/m.