{"title":"CMOS技术中GSM标准的多速率Sigma Delta调制器","authors":"M. Laguna, R. Viladoms, F. Colodro, A. Torralba","doi":"10.1109/NORCHP.2009.5397820","DOIUrl":null,"url":null,"abstract":"A multirate 3rd order modulator targeting GSM standard is presented in this paper. Dynamic Element Matching technique to improve the linearity for the 4-bit DAC in the external feedback path is described. High-level simulations give a maximum SNDR of 79.98 dB while simulation results for a prototype made in a standard 0.6 µm CMOS technology show that the SNDR at the transistor level achieves 78.47 dB including 1% of mismatch, proving a good response of the 4-bit DAC with Dynamic Element Matching technique included.","PeriodicalId":308859,"journal":{"name":"2009 NORCHIP","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A multirate Sigma Delta modulator for GSM standard in CMOS technology\",\"authors\":\"M. Laguna, R. Viladoms, F. Colodro, A. Torralba\",\"doi\":\"10.1109/NORCHP.2009.5397820\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multirate 3rd order modulator targeting GSM standard is presented in this paper. Dynamic Element Matching technique to improve the linearity for the 4-bit DAC in the external feedback path is described. High-level simulations give a maximum SNDR of 79.98 dB while simulation results for a prototype made in a standard 0.6 µm CMOS technology show that the SNDR at the transistor level achieves 78.47 dB including 1% of mismatch, proving a good response of the 4-bit DAC with Dynamic Element Matching technique included.\",\"PeriodicalId\":308859,\"journal\":{\"name\":\"2009 NORCHIP\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 NORCHIP\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORCHP.2009.5397820\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 NORCHIP","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHP.2009.5397820","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
提出了一种针对GSM标准的多速率三阶调制器。描述了一种动态元件匹配技术,以改善4位DAC在外部反馈路径上的线性度。高级仿真结果显示,最大SNDR为79.98 dB,而采用标准0.6 μ m CMOS技术制作的原型的仿真结果显示,晶体管级SNDR达到78.47 dB,包括1%的失配,证明了包含动态元件匹配技术的4位DAC的良好响应。
A multirate Sigma Delta modulator for GSM standard in CMOS technology
A multirate 3rd order modulator targeting GSM standard is presented in this paper. Dynamic Element Matching technique to improve the linearity for the 4-bit DAC in the external feedback path is described. High-level simulations give a maximum SNDR of 79.98 dB while simulation results for a prototype made in a standard 0.6 µm CMOS technology show that the SNDR at the transistor level achieves 78.47 dB including 1% of mismatch, proving a good response of the 4-bit DAC with Dynamic Element Matching technique included.