{"title":"pf补偿低失真AC/DC前端","authors":"G.M. Conard","doi":"10.1109/ICHQP.2004.1409421","DOIUrl":null,"url":null,"abstract":"Passive three-phase power supply front-ends usually consist of an EMI filter, a transformer, and a full-wave rectification stage to obtain an output DC voltage. This output voltage is unregulated and contains approximately 4% voltage ripple for a 3-phase system. The resulting input line power factor is a function of the load reactance, and is typically nonunity. If the load reactance is heavily capacitive, a means must be available to handle the large inrush current, otherwise, the input breaker may trip open, resulting in an embarrassing situation, necessitating the addition of inrush current limiting circuitry. The harmonic input current usually is above 10% for the 5/sup th/ and 7/sup th/ harmonics, again a highly unsavory situation, but one that has been with us for quite some time. In essence, what would be desired from a front-end would be the following properties: regulated output voltage, unity PF, inrush current limiting, harmonic line distortion <3 %. The switched matrix AC/DC front-end solution achieves all the above properties, and is presently technically feasible as will be shown in the following article. It simply consists of six unidirectional switches, typically field effect transistors, and a control printed wiring board that provides the proper pulse-width-modulation and sequencing to the six switches. The control algorithms for the PWM and sequencing are derived from prior work that is readily available in the literature generated by Messrs. Venturini, Ishiguru, and Holmes. What makes the switched-matrix more feasible today than in the past is the tremendous increase in computational speed and power that is required to realize the control algorithm, in addition to new generations of fast power semiconductors. This work makes the use of PSPICE to simulate this innovative solution and determine some of its characteristics.","PeriodicalId":406398,"journal":{"name":"2004 11th International Conference on Harmonics and Quality of Power (IEEE Cat. No.04EX951)","volume":"233 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"PF-compensated low-distortion AC/DC front-end\",\"authors\":\"G.M. Conard\",\"doi\":\"10.1109/ICHQP.2004.1409421\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Passive three-phase power supply front-ends usually consist of an EMI filter, a transformer, and a full-wave rectification stage to obtain an output DC voltage. This output voltage is unregulated and contains approximately 4% voltage ripple for a 3-phase system. The resulting input line power factor is a function of the load reactance, and is typically nonunity. If the load reactance is heavily capacitive, a means must be available to handle the large inrush current, otherwise, the input breaker may trip open, resulting in an embarrassing situation, necessitating the addition of inrush current limiting circuitry. The harmonic input current usually is above 10% for the 5/sup th/ and 7/sup th/ harmonics, again a highly unsavory situation, but one that has been with us for quite some time. In essence, what would be desired from a front-end would be the following properties: regulated output voltage, unity PF, inrush current limiting, harmonic line distortion <3 %. The switched matrix AC/DC front-end solution achieves all the above properties, and is presently technically feasible as will be shown in the following article. It simply consists of six unidirectional switches, typically field effect transistors, and a control printed wiring board that provides the proper pulse-width-modulation and sequencing to the six switches. The control algorithms for the PWM and sequencing are derived from prior work that is readily available in the literature generated by Messrs. Venturini, Ishiguru, and Holmes. What makes the switched-matrix more feasible today than in the past is the tremendous increase in computational speed and power that is required to realize the control algorithm, in addition to new generations of fast power semiconductors. This work makes the use of PSPICE to simulate this innovative solution and determine some of its characteristics.\",\"PeriodicalId\":406398,\"journal\":{\"name\":\"2004 11th International Conference on Harmonics and Quality of Power (IEEE Cat. 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Passive three-phase power supply front-ends usually consist of an EMI filter, a transformer, and a full-wave rectification stage to obtain an output DC voltage. This output voltage is unregulated and contains approximately 4% voltage ripple for a 3-phase system. The resulting input line power factor is a function of the load reactance, and is typically nonunity. If the load reactance is heavily capacitive, a means must be available to handle the large inrush current, otherwise, the input breaker may trip open, resulting in an embarrassing situation, necessitating the addition of inrush current limiting circuitry. The harmonic input current usually is above 10% for the 5/sup th/ and 7/sup th/ harmonics, again a highly unsavory situation, but one that has been with us for quite some time. In essence, what would be desired from a front-end would be the following properties: regulated output voltage, unity PF, inrush current limiting, harmonic line distortion <3 %. The switched matrix AC/DC front-end solution achieves all the above properties, and is presently technically feasible as will be shown in the following article. It simply consists of six unidirectional switches, typically field effect transistors, and a control printed wiring board that provides the proper pulse-width-modulation and sequencing to the six switches. The control algorithms for the PWM and sequencing are derived from prior work that is readily available in the literature generated by Messrs. Venturini, Ishiguru, and Holmes. What makes the switched-matrix more feasible today than in the past is the tremendous increase in computational speed and power that is required to realize the control algorithm, in addition to new generations of fast power semiconductors. This work makes the use of PSPICE to simulate this innovative solution and determine some of its characteristics.