Sunil Dutt, Anshu Chauhan, Rahul Bhadoriya, Sukumar Nandi, G. Trivedi
{"title":"面向容错应用的高性能节能混合冗余MAC","authors":"Sunil Dutt, Anshu Chauhan, Rahul Bhadoriya, Sukumar Nandi, G. Trivedi","doi":"10.1109/VLSID.2015.65","DOIUrl":null,"url":null,"abstract":"In the majority of Digital Signal Processing (DSP) applications, such as image, audio and video processing, the final result is interpreted by human senses, and, the fact of confined perception of human senses declines the strict restriction on accuracy. Thus, by adopting the emerging concept of approximate computing, we propose an approximate radix-2 hybrid redundant Multiply-and-Accumulate (Approx MAC) unit which stems a novel Speed-Power-Accuracy-Area (SPAA) metrics. The Approx MAC unit attains tremendous improvements in computational performance, energy efficiency and silicon area with a trivial degradation in the output quality. To inspect the effectiveness of the proposed approach in real-time DSP applications, we demonstrate an Approx MAC unit embedded JPEG-E-X IP core architecture. The Approx MAC unit with 40 approximate LSBs ensures 7.177x and 1.526x speedup, 1.594x and 4.163x energy efficiency, and 1.131x and 1.277x silicon area improvements over binary and hybrid redundant MAC units, respectively. Moreover, the Approx MAC unit with 40 approximate LSBs decorates power precision and delay-precision metrics by 14.71% and 32.95%, respectively.","PeriodicalId":123635,"journal":{"name":"2015 28th International Conference on VLSI Design","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications\",\"authors\":\"Sunil Dutt, Anshu Chauhan, Rahul Bhadoriya, Sukumar Nandi, G. Trivedi\",\"doi\":\"10.1109/VLSID.2015.65\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the majority of Digital Signal Processing (DSP) applications, such as image, audio and video processing, the final result is interpreted by human senses, and, the fact of confined perception of human senses declines the strict restriction on accuracy. Thus, by adopting the emerging concept of approximate computing, we propose an approximate radix-2 hybrid redundant Multiply-and-Accumulate (Approx MAC) unit which stems a novel Speed-Power-Accuracy-Area (SPAA) metrics. The Approx MAC unit attains tremendous improvements in computational performance, energy efficiency and silicon area with a trivial degradation in the output quality. To inspect the effectiveness of the proposed approach in real-time DSP applications, we demonstrate an Approx MAC unit embedded JPEG-E-X IP core architecture. The Approx MAC unit with 40 approximate LSBs ensures 7.177x and 1.526x speedup, 1.594x and 4.163x energy efficiency, and 1.131x and 1.277x silicon area improvements over binary and hybrid redundant MAC units, respectively. Moreover, the Approx MAC unit with 40 approximate LSBs decorates power precision and delay-precision metrics by 14.71% and 32.95%, respectively.\",\"PeriodicalId\":123635,\"journal\":{\"name\":\"2015 28th International Conference on VLSI Design\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th International Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSID.2015.65\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2015.65","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications
In the majority of Digital Signal Processing (DSP) applications, such as image, audio and video processing, the final result is interpreted by human senses, and, the fact of confined perception of human senses declines the strict restriction on accuracy. Thus, by adopting the emerging concept of approximate computing, we propose an approximate radix-2 hybrid redundant Multiply-and-Accumulate (Approx MAC) unit which stems a novel Speed-Power-Accuracy-Area (SPAA) metrics. The Approx MAC unit attains tremendous improvements in computational performance, energy efficiency and silicon area with a trivial degradation in the output quality. To inspect the effectiveness of the proposed approach in real-time DSP applications, we demonstrate an Approx MAC unit embedded JPEG-E-X IP core architecture. The Approx MAC unit with 40 approximate LSBs ensures 7.177x and 1.526x speedup, 1.594x and 4.163x energy efficiency, and 1.131x and 1.277x silicon area improvements over binary and hybrid redundant MAC units, respectively. Moreover, the Approx MAC unit with 40 approximate LSBs decorates power precision and delay-precision metrics by 14.71% and 32.95%, respectively.