{"title":"CORDIC角度单位的VLSI实现","authors":"Jeong-A Lee, Mubashir Ahmad","doi":"10.1109/GLSV.1994.289979","DOIUrl":null,"url":null,"abstract":"We design angle units using Lager tools both by a conventional CORDIC algorithm and a fast algorithm called Constant-Factor Redundant CORDIC (CFR-CORDIC) and show that the CFR-CORDIC occupies more than twice the area of a conventional CORDIC but offers good speed-up. We discuss VLSI design issues using Lager such as system partitioning and grouping, floor planning, width and height manipulation to obtain the smallest geometry, and the limitation of the standard cell design approach. In addition, a bit encoding scheme of a signed digit number representation, which simplifies the implementation of the negation is presented.<<ETX>>","PeriodicalId":330584,"journal":{"name":"Proceedings of 4th Great Lakes Symposium on VLSI","volume":"196 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"VLSI implementation of CORDIC angle units\",\"authors\":\"Jeong-A Lee, Mubashir Ahmad\",\"doi\":\"10.1109/GLSV.1994.289979\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We design angle units using Lager tools both by a conventional CORDIC algorithm and a fast algorithm called Constant-Factor Redundant CORDIC (CFR-CORDIC) and show that the CFR-CORDIC occupies more than twice the area of a conventional CORDIC but offers good speed-up. We discuss VLSI design issues using Lager such as system partitioning and grouping, floor planning, width and height manipulation to obtain the smallest geometry, and the limitation of the standard cell design approach. In addition, a bit encoding scheme of a signed digit number representation, which simplifies the implementation of the negation is presented.<<ETX>>\",\"PeriodicalId\":330584,\"journal\":{\"name\":\"Proceedings of 4th Great Lakes Symposium on VLSI\",\"volume\":\"196 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 4th Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1994.289979\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 4th Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1994.289979","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We design angle units using Lager tools both by a conventional CORDIC algorithm and a fast algorithm called Constant-Factor Redundant CORDIC (CFR-CORDIC) and show that the CFR-CORDIC occupies more than twice the area of a conventional CORDIC but offers good speed-up. We discuss VLSI design issues using Lager such as system partitioning and grouping, floor planning, width and height manipulation to obtain the smallest geometry, and the limitation of the standard cell design approach. In addition, a bit encoding scheme of a signed digit number representation, which simplifies the implementation of the negation is presented.<>
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