一种基于FPGA的SM2硬件实现的SPA策略

2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID) Pub Date : 2021-10-29 DOI:10.1109/asid52932.2021.9651700

Jiahao Fang, Liji Wu, Xiangmin Zhang

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引用次数: 1

摘要

SM2算法在金融IC卡领域得到了广泛的应用。然而，它很容易受到侧信道的攻击，简单功率分析(SPA)是最常见的攻击方法。提出了一种原子点相加和点加倍算法用于SM2算法中。基于与SAKURA-G FPGA板的软硬件协同设计，在256位SM2数字签名算法中验证了算法的正确性，并采集了功耗曲线。实验表明，原子算法提高了SM2的抗SPA能力。

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A Novel SPA Countermeasure for SM2 Hardware Implementation with FPGA

SM2 algorithm has been widely used in the field of financial IC cards. However, it is easy to be attacked by the side channel, and Simple Power Analysis (SPA) is the most common attack method. An atomic point addition and point doubling algorithms is proposed to be used in SM2 algorithm against SPA. Based on the software and hardware co-design with SAKURA-G FPGA board, the correctness of the algorithm is verified in the 256-bit SM2 digital signature algorithm, and the power consumption curves are collected. Experiments show that the atomic algorithm improves the ability to resist SPA in SM2.

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来源期刊

2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)

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