薄膜网:一种在高密度和高速单芯片封装中降低噪声的新方法

S. Ray, H. Hamel, H. Stoller
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引用次数: 2

摘要

微处理器技术的最新趋势是高速器件(200- 400mhz),具有大量同时开关驱动器。除了提供高信号I/O封装这些器件的能力外,封装还必须在片上驱动器和去耦电容器之间提供低电感路径。这是低电压分布噪声所必需的。本文描述了一种在陶瓷衬底上具有薄膜网状结构的多层陶瓷封装。电气分析表明,使用该封装的高速、高I/O设备可以实现约20%的电压分布噪声降低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Thin film mesh: a novel approach for noise reduction in high density and high-speed single chip packages
The recent trend in microprocessor technology is for high speed devices (200-400 MHz) with a large number of simultaneously switching drivers. Other than providing the capability of packaging these devices with high signal I/O, the package also has to provide a low inductance path between the on chip drivers and decoupling capacitors. This is required for a low voltage distribution noise. In this paper, a multi-layer ceramic package with a thin film mesh structure on top of the ceramic substrate is described. Electrical analysis is presented to show that about 20% reduction in voltage distribution noise can be achieved for a high speed, high I/O device utilizing this package.
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