Automatic test generation for micro-architectural verification of configurable microprocessor cores with user extensions

Configurable processor cows me replacing standard CPU cores for meeting the complexities of System on a Chip designs, since standard cores often prove inadequate in performance without special hardware. Xtensa, a fully configurable and extensible processor core, allows users to add new instructions to the processor core optimized for their application. This kind of flexible architecture demands innovative verification techniques, since the instruction set of the processor as well as the pipeline model is no longer fixed. Here we describe a methodology for verifying the implementation of such processors and extensions based on an Instruction Set Architecture description. This method automatically generates micro-architectural tests without specific knowledge of the implementation. This is extremely powerful in the verification of configurable processors with extensible instruction sets and pipeline models.