{"title":"实现短时经典HC应力对低于0.5 /spl mu/m的nmosfet在线可靠性控制","authors":"R. Gonella","doi":"10.1109/IRWS.2000.911925","DOIUrl":null,"url":null,"abstract":"The purpose of this paper is to show that in advanced sub-0.5 /spl mu/m technologies, short-time classical hot-carrier (HC) stress tests are suitable for a predictive in-line monitoring. The ability of such tests in detecting maverick lots and the comparison with the performances of an already proposed fast method, lead to consider this approach as very attractive for wafer-level reliability control (WLRC) purposes.","PeriodicalId":374889,"journal":{"name":"2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Implementation of short-time classical HC stresses for in-line reliability control of sub-0.5 /spl mu/m nMOSFETs\",\"authors\":\"R. Gonella\",\"doi\":\"10.1109/IRWS.2000.911925\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The purpose of this paper is to show that in advanced sub-0.5 /spl mu/m technologies, short-time classical hot-carrier (HC) stress tests are suitable for a predictive in-line monitoring. The ability of such tests in detecting maverick lots and the comparison with the performances of an already proposed fast method, lead to consider this approach as very attractive for wafer-level reliability control (WLRC) purposes.\",\"PeriodicalId\":374889,\"journal\":{\"name\":\"2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRWS.2000.911925\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRWS.2000.911925","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of short-time classical HC stresses for in-line reliability control of sub-0.5 /spl mu/m nMOSFETs
The purpose of this paper is to show that in advanced sub-0.5 /spl mu/m technologies, short-time classical hot-carrier (HC) stress tests are suitable for a predictive in-line monitoring. The ability of such tests in detecting maverick lots and the comparison with the performances of an already proposed fast method, lead to consider this approach as very attractive for wafer-level reliability control (WLRC) purposes.