Logic Locking for Hardware Security Using Voltage-Gated Spin-orbit Torque Magnetic Tunnel Junction

With the rapid interest in exploiting the advantages of beyond CMOS devices in various applications, we explore, in this work, voltage-gated spin-orbit torque-assisted magnetic tunnel junction (VGSOT-MTJ) based on the Verilog-A behavioral model to design a possible logic locking system for hardware security. The VGSOT MTJ can switch without needing a magnetic field, and the antiferromagnetic (AFM) strip provides SOT and an exchange bias, thus paving the way for more practical applications. Compared to spin transfer torque (STT) MTJs, these AFM-based SOT-MTJs do not require passing high write current through the thin layer of the MTJ stack, thus increasing their endurance significantly. Compared with Heavy metal (HM) based SOT-MTJ, the VGSOT-MTJ utilizes the voltage-controlled magnetic anisotropy (VCMA) effect to significantly reduce the $J_{\mathbf{SOT},\mathbf{critical}}$. We perform a Monte-Carlo analysis to account for the effect of Process Variation on critical MTJ parameters for designing the logic locking block. Eye Diagram test, transient performance, and the effect of thermal noise are analyzed for High-Speed Integrated Circuits systems, and the results are compared with HM-based SOT-assisted MTJ as both are three-terminal (3T) MTJ structures.