FPGA实现人脸识别系统采用高效的5/3 2d提升方案

2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) Pub Date : 1900-01-01 DOI:10.1109/VLSI-SATA.2016.7593025

Satish S. Bhairannawar, Rajath Kumar, Varsha Mirji, P. Sindhu

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引用次数: 4

摘要

在当今的现实世界中，人脸识别对于自动交易越来越重要。本文提出了一种基于高效5/3二维提升方案的人脸识别系统的FPGA实现方案。将FVC-2004 DB3_A的数据库图像调整为256×256像素。将调整后的图像与3×3高斯掩模核进行卷积，去除高频边缘，提高匹配精度。采用提出的5/3 2D-Lift DWT提取128×128系数的LL波段特征。同样，提取测试图像的LL波段特征，并使用欧几里得距离分类器与数据库图像的LL波段特征进行比较，进行精确匹配。所提出的人脸识别架构在Virtex5 xc5vlx110-2ff676板上实现。与现有架构相比，该架构的面积和速度等性能参数都有所提高。

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FPGA implementation of face recognition system using efficient 5/3 2D-lifting scheme

Face recognition is gaining more importance in today's real world for automated transactions. In this paper, we propose FPGA Implementation of Face Recognition System using Efficient 5/3 2D-Lifting scheme. The database image of FVC-2004 DB3_A is resized to 256×256 pixels. The resized image is convolved with 3×3 Gaussian mask kernels to remove high frequency edges, which improves matching accuracy. The proposed 5/3 2D-Lift DWT is used to extract LL band features of 128×128 coefficients. Similarly, the test image LL band features are extracted and are compared with LL band features of database image using Euclidean distance classifier for accurate matching. The proposed face recognition architecture is implemented on Virtex5 xc5vlx110-2ff676 board. It is observed that the performance parameters such as area and speed are better compared to existing architectures.

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来源期刊

2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)

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