具有背景偏移抵消的165 MS/s 8位CMOS A/D转换器

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) Pub Date : 2001-05-06 DOI:10.1109/CICC.2001.929745

G. Feygin, K. Nagaraj, R. Chattopadhyay, R. Herrera, I. Papantonopoulos, D. A. Martin, P. Wu, S. Pavan

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引用次数: 9

摘要

介绍了一种采用高效结构的8位A/D转换器。它的一个重要特征是背景偏移抵消方案。该A/D转换器采用0.18 /spl mu/m的数字CMOS技术实现。它的工作速度高达165 MS/s, SNDR为43.5 dB, DNL为0.7 LSB, INL为1 LSB。它的有效面积为0.9 mm/sup 2/，功耗为140 mW。

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A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation

A 8-bit A/D converter using an efficient architecture is described. An important feature of this is a background offset cancellation scheme. This A/D converter has been implemented in a 0.18 /spl mu/m digital CMOS technology. It operates at up to 165 MS/s with an SNDR of 43.5 dB, a DNL of 0.7 LSB and an INL of 1 LSB. It occupies an active area of 0.9 mm/sup 2/ and has a power dissipation of 140 mW.

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Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)

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