{"title":"用于实时测距的CMOS成像芯片","authors":"U. Çilingiroğlu, Sicheng Chen","doi":"10.1109/MWSCAS.2000.951413","DOIUrl":null,"url":null,"abstract":"A novel CMOS imaging chip for real-time range finding is described. The system can extract range information without any mechanical movement and all the signal processing is done on chip. All the image sensors and mixed-signal processors are integrated in a chip. A prototype chip has been fabricated in 0.5 /spl mu/m CMOS technology that occupies 0.9 mm /spl times/ 0.9 mm silicon area. It can report the distance in the range 1.5 m - 10 m in 18 scales. Analog power dissipation is 50 mW for a 5 V power supply. The paper presents the proposed range extraction concept, describes the technique and circuit architecture, and verifies functionality by simulated results.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A CMOS imaging chip for real-time range finding\",\"authors\":\"U. Çilingiroğlu, Sicheng Chen\",\"doi\":\"10.1109/MWSCAS.2000.951413\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel CMOS imaging chip for real-time range finding is described. The system can extract range information without any mechanical movement and all the signal processing is done on chip. All the image sensors and mixed-signal processors are integrated in a chip. A prototype chip has been fabricated in 0.5 /spl mu/m CMOS technology that occupies 0.9 mm /spl times/ 0.9 mm silicon area. It can report the distance in the range 1.5 m - 10 m in 18 scales. Analog power dissipation is 50 mW for a 5 V power supply. The paper presents the proposed range extraction concept, describes the technique and circuit architecture, and verifies functionality by simulated results.\",\"PeriodicalId\":437349,\"journal\":{\"name\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2000.951413\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951413","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
介绍了一种用于实时测距的新型CMOS成像芯片。该系统无需任何机械运动即可提取距离信息,所有信号处理均在芯片上完成。所有的图像传感器和混合信号处理器都集成在一个芯片上。原型芯片采用0.5 /spl μ m CMOS技术,占据0.9 mm /spl倍/ 0.9 mm的硅面积。它可以报告距离范围在1.5米至10米18尺度。模拟功耗为50mw的5v电源。本文介绍了所提出的测距提取概念,描述了技术和电路结构,并通过仿真结果验证了其功能。
A novel CMOS imaging chip for real-time range finding is described. The system can extract range information without any mechanical movement and all the signal processing is done on chip. All the image sensors and mixed-signal processors are integrated in a chip. A prototype chip has been fabricated in 0.5 /spl mu/m CMOS technology that occupies 0.9 mm /spl times/ 0.9 mm silicon area. It can report the distance in the range 1.5 m - 10 m in 18 scales. Analog power dissipation is 50 mW for a 5 V power supply. The paper presents the proposed range extraction concept, describes the technique and circuit architecture, and verifies functionality by simulated results.