CMOS组合电路的跃迁数测试

[1991] Proceedings. First Great Lakes Symposium on VLSI Pub Date : 1991-03-01 DOI:10.1109/GLSV.1991.143951

K. S. Manjunath, Damu Radharkrishnan

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引用次数: 0

摘要

提出了一种检测CMOS组合电路卡开故障的最优鲁棒过渡数测试方法。开发了优化常规卡开故障测试装置的程序。使用断层折叠图作为工具，以产生最优的测试序列，已经说明。非再收敛和再收敛，不冗余，电路处理。

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Transition count testing of CMOS combinational circuits

An optimal, robust transition count test generation for testing stuck-open faults in CMOS combinational circuits is presented in this paper. Procedures to optimize conventional stuck-open fault test sets have been developed. The use of fault folding graphs as a tool, to generate optimal test sequences, has been illustrated. Both non-reconvergent and reconvergent, irredundant, circuits are treated,.<>

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[1991] Proceedings. First Great Lakes Symposium on VLSI

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