基于SiGe BiCMOS技术实现的40gbps微环调制器驱动

A. Fatemi, H. Klar, F. Gerfers, D. Kissinger
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引用次数: 1

摘要

本文提出了一种采用130nm SiGe BiCMOS技术实现的40gbps微环调制器驱动IC,其最大频率为250GHz。提出的带宽优化驱动IC实现了集成高阻抗硅光子环形调制器所需的2Vppd输出信号摆幅,当差分端接100Ω时达到1Vppd输出信号摆幅。包括输入端和偏置在内的完整驱动器在单个2:5V电源下运行时消耗90mW。无电感驱动器架构利用电流密度优化的级联编码拓扑和电容退化来提高总带宽和输出电压摆幅。驱动核心仅占0.04mm2。小信号测量显示,在33GHz的-3dB带宽下差分增益为16dB,在33GHz时回波损耗为-15dB。该设计代表了最快的微环调制器驱动器之一,FOM为2.25 pJ/(bitx²Vppd),高于25 Gbps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 40 Gbps Micro-Ring Modulator Driver Implemented in a SiGe BiCMOS Technology
This paper presents a 40 Gbps micro-ring modulator driver IC implemented in a 130nm SiGe BiCMOS technology providing a fT,max of 250GHz. The proposed bandwidth-optimized driver IC achieves 2Vppd output signal swing required for the integrated high-impedance silicon photonics ring modulator or 1Vppd when differentially terminated with 100Ω. The complete driver including input termination and biasing consumes 90mW operated from a single 2:5V power supply. The inductor-less driver architecture exploits a current density optimized cascode topology with capacitive degeneration to improve both, the overall bandwidth and the output voltage swing. The driver core occupies only 0.04mm2. Small-signal measurements show a differential gain of 16dB with a -3dB bandwidth of 33GHz and a return loss of -15dB at 33GHz. This design represents one of the fastest micro-ring modulator drivers with FOM of 2.25 pJ/(bit×⌉Vppd) above 25 Gbps.
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