多核量子架构的缩放:一个通信感知的结构化差距分析

Santiago Rodrigo, Medina Bandic, S. Abadal, Hans van Someren, E. Alarcón, C. G. Almudever
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引用次数: 5

摘要

在大规模量子计算机的探索中,多核分布式架构被认为是一个值得探索的引人注目的替代方案。这种方法的一个关键方面是,当量子比特需要交互时,对核心之间的通信有严格的要求,这限制了这些架构的可扩展性潜力。在这项工作中,我们解决了核间通信成本如何影响量子多核方法可行性的问题。在方法上,我们考虑了一个设计空间,其中架构变量(核心数量,每个核心的量子比特数量),几个量子基准的应用变量(量子比特数量,门的数量,两个量子比特门的百分比)和核间通信延迟随着价值值的定义一起被扫描。这种方法产生了对设计空间趋势的定性理解和体系结构的配套维度指导方针(包括最优点),以及对多核体系结构超出哪些通信性能水平的问题的定量回答。我们的结果允许确定核间通信延迟的阈值,以便多核架构优于单核量子处理器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Scaling of multi-core quantum architectures: a communications-aware structured gap analysis
In the quest of large-scale quantum computers, multi-core distributed architectures are considered a compelling alternative to be explored. A crucial aspect in such approach is the stringent demand on communication among cores when qubits need to interact, which conditions the scalability potential of these architectures. In this work, we address the question of how the cost of the communication among cores impacts on the viability of the quantum multi-core approach. Methodologically, we consider a design space in which architectural variables (number of cores, number of qubits per core), application variables for several quantum benchmarks (number of qubits, number of gates, percentage of two-qubit gates) and inter-core communication latency are swept along with the definition of a figure of merit. This approach yields both a qualitative understanding of trends in the design space and companion dimensioning guidelines for the architecture, including optimal points, as well as quantitative answers to the question of beyond which communication performance levels the multi-core architecture pays off. Our results allow to determine the thresholds for inter-core communication latency in order for multi-core architectures to outperform single-core quantum processors.
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