用于人工神经网络的芯片和计算机

M. Bogdan, H. Speckmann, W. Rosenstiel
{"title":"用于人工神经网络的芯片和计算机","authors":"M. Bogdan, H. Speckmann, W. Rosenstiel","doi":"10.1002/1616-8984(199610)2:1<105::AID-SEUP105>3.0.CO;2-Q","DOIUrl":null,"url":null,"abstract":"In this chapter we have described a small number of chips and neurocomputers for artificial neural nets. The architectures presented are commercially available. As examples, we have presented two chips (ETANN and Nestor / Intel Ni100), two neurocomputers based on standard components (MUSIC, HNC SNAP), and two neurocomputers (CNAPS, SYNAPSE) with special chips (X1 and MA16, respectively). An overview is given in Table 6-1. The following abbreviations are used: NP for number of processors, M for memory, WL for word length, SISD for single instruction single data, SIMD for single instruction multiple data, MIMD for multiple instructions multiple data, BP for back-propagation and SOM for Kohonens self-organizing map. The presented values are taken from [3, 5, 7] and [13].","PeriodicalId":154848,"journal":{"name":"Sensors Update","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Chips and Computers for Artificial Neural Nets\",\"authors\":\"M. Bogdan, H. Speckmann, W. Rosenstiel\",\"doi\":\"10.1002/1616-8984(199610)2:1<105::AID-SEUP105>3.0.CO;2-Q\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this chapter we have described a small number of chips and neurocomputers for artificial neural nets. The architectures presented are commercially available. As examples, we have presented two chips (ETANN and Nestor / Intel Ni100), two neurocomputers based on standard components (MUSIC, HNC SNAP), and two neurocomputers (CNAPS, SYNAPSE) with special chips (X1 and MA16, respectively). An overview is given in Table 6-1. The following abbreviations are used: NP for number of processors, M for memory, WL for word length, SISD for single instruction single data, SIMD for single instruction multiple data, MIMD for multiple instructions multiple data, BP for back-propagation and SOM for Kohonens self-organizing map. The presented values are taken from [3, 5, 7] and [13].\",\"PeriodicalId\":154848,\"journal\":{\"name\":\"Sensors Update\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Sensors Update\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1002/1616-8984(199610)2:1<105::AID-SEUP105>3.0.CO;2-Q\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Sensors Update","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1002/1616-8984(199610)2:1<105::AID-SEUP105>3.0.CO;2-Q","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

在本章中,我们描述了用于人工神经网络的少量芯片和神经计算机。所介绍的体系结构在商业上是可用的。作为例子,我们展示了两种芯片(ETANN和Nestor / Intel Ni100),两种基于标准组件的神经计算机(MUSIC, HNC SNAP),以及两种带有特殊芯片(X1和MA16)的神经计算机(CNAPS, SYNAPSE)。概述如表6-1所示。使用以下缩写:NP表示处理器数,M表示内存,WL表示字长,SISD表示单指令单数据,SIMD表示单指令多数据,MIMD表示多指令多数据,BP表示反向传播,SOM表示Kohonens自组织映射。所示数值分别取自[3,5,7]和[13]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Chips and Computers for Artificial Neural Nets
In this chapter we have described a small number of chips and neurocomputers for artificial neural nets. The architectures presented are commercially available. As examples, we have presented two chips (ETANN and Nestor / Intel Ni100), two neurocomputers based on standard components (MUSIC, HNC SNAP), and two neurocomputers (CNAPS, SYNAPSE) with special chips (X1 and MA16, respectively). An overview is given in Table 6-1. The following abbreviations are used: NP for number of processors, M for memory, WL for word length, SISD for single instruction single data, SIMD for single instruction multiple data, MIMD for multiple instructions multiple data, BP for back-propagation and SOM for Kohonens self-organizing map. The presented values are taken from [3, 5, 7] and [13].
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信