{"title":"用于低功耗和低电压应用的10位20毫秒采样/秒ADC","authors":"G. Sou, G. Lu, G. Klisnick, M. Redon","doi":"10.1109/ASIC.1998.722802","DOIUrl":null,"url":null,"abstract":"For the development of new low-voltage, low-power imaging microsystems, we have designed and fabricated a 10-bit 20 Msample/s ADC. Low-voltage, low-power designs require specifically designed analog building blocks. The ADC makes use of time-interleaving, switched capacitor amplifiers including dynamic frequency compensation and offset cancellation.","PeriodicalId":104431,"journal":{"name":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 10-bit 20-Msample/s ADC for low-power and low-voltage applications\",\"authors\":\"G. Sou, G. Lu, G. Klisnick, M. Redon\",\"doi\":\"10.1109/ASIC.1998.722802\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the development of new low-voltage, low-power imaging microsystems, we have designed and fabricated a 10-bit 20 Msample/s ADC. Low-voltage, low-power designs require specifically designed analog building blocks. The ADC makes use of time-interleaving, switched capacitor amplifiers including dynamic frequency compensation and offset cancellation.\",\"PeriodicalId\":104431,\"journal\":{\"name\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1998.722802\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1998.722802","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10-bit 20-Msample/s ADC for low-power and low-voltage applications
For the development of new low-voltage, low-power imaging microsystems, we have designed and fabricated a 10-bit 20 Msample/s ADC. Low-voltage, low-power designs require specifically designed analog building blocks. The ADC makes use of time-interleaving, switched capacitor amplifiers including dynamic frequency compensation and offset cancellation.