{"title":"新型瞬态检测电路检测显示面板中静电干扰的自动恢复设计","authors":"Cheng-Cheng Yen, Wan-Yen Lin, M. Ker, Che-Ming Yang, Shih-Fan Chen, Tung-Yang Chen","doi":"10.1109/DTIS.2011.5941441","DOIUrl":null,"url":null,"abstract":"A new transient detection circuit against system-level electrostatic discharge (ESD) transient disturbance is proposed for display panel protection. The circuit function to detect positive or negative electrical transients under system-level ESD tests has been evaluated in HSPICE simulation and verified in 0.13-nm silicon chip. The output signal of the proposed transient detection circuit can be used as a firmware index to execute system automatic recovery operation. With hardware/firmware system co-design, the immunity of display panels against transient disturbance under system-level ESD tests can be enhanced.","PeriodicalId":409387,"journal":{"name":"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"New transient detection circuit to detect ESD-induced disturbance for automatic recovery design in display panels\",\"authors\":\"Cheng-Cheng Yen, Wan-Yen Lin, M. Ker, Che-Ming Yang, Shih-Fan Chen, Tung-Yang Chen\",\"doi\":\"10.1109/DTIS.2011.5941441\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new transient detection circuit against system-level electrostatic discharge (ESD) transient disturbance is proposed for display panel protection. The circuit function to detect positive or negative electrical transients under system-level ESD tests has been evaluated in HSPICE simulation and verified in 0.13-nm silicon chip. The output signal of the proposed transient detection circuit can be used as a firmware index to execute system automatic recovery operation. With hardware/firmware system co-design, the immunity of display panels against transient disturbance under system-level ESD tests can be enhanced.\",\"PeriodicalId\":409387,\"journal\":{\"name\":\"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2011.5941441\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2011.5941441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New transient detection circuit to detect ESD-induced disturbance for automatic recovery design in display panels
A new transient detection circuit against system-level electrostatic discharge (ESD) transient disturbance is proposed for display panel protection. The circuit function to detect positive or negative electrical transients under system-level ESD tests has been evaluated in HSPICE simulation and verified in 0.13-nm silicon chip. The output signal of the proposed transient detection circuit can be used as a firmware index to execute system automatic recovery operation. With hardware/firmware system co-design, the immunity of display panels against transient disturbance under system-level ESD tests can be enhanced.