{"title":"DVB-T2发射机的SDR实现:核心构建模块","authors":"C. Fantozzi, L. Vangelista, D. Vogrig, O. Campana","doi":"10.1109/ICCE.2011.5722644","DOIUrl":null,"url":null,"abstract":"In this paper we describe the implementation of a DVB-T2 transmitter on a commercially-available hardware platform. The implementation leverages on the Software-Defined Radio (SDR) characteristics of the platform to attain on-the fly reconfigurability. The paper focuses on the two most computationally intensive blocks of the transmitter: the LDPC encoder and the IFFT processor.","PeriodicalId":256368,"journal":{"name":"2011 IEEE International Conference on Consumer Electronics (ICCE)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"SDR implementation of a DVB-T2 transmitter: The core building blocks\",\"authors\":\"C. Fantozzi, L. Vangelista, D. Vogrig, O. Campana\",\"doi\":\"10.1109/ICCE.2011.5722644\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we describe the implementation of a DVB-T2 transmitter on a commercially-available hardware platform. The implementation leverages on the Software-Defined Radio (SDR) characteristics of the platform to attain on-the fly reconfigurability. The paper focuses on the two most computationally intensive blocks of the transmitter: the LDPC encoder and the IFFT processor.\",\"PeriodicalId\":256368,\"journal\":{\"name\":\"2011 IEEE International Conference on Consumer Electronics (ICCE)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference on Consumer Electronics (ICCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCE.2011.5722644\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Consumer Electronics (ICCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2011.5722644","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SDR implementation of a DVB-T2 transmitter: The core building blocks
In this paper we describe the implementation of a DVB-T2 transmitter on a commercially-available hardware platform. The implementation leverages on the Software-Defined Radio (SDR) characteristics of the platform to attain on-the fly reconfigurability. The paper focuses on the two most computationally intensive blocks of the transmitter: the LDPC encoder and the IFFT processor.