可编程架构-第19部分

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) Pub Date : 1900-01-01 DOI:10.1109/cicc.2004.1358837

J. Wright

{"title":"可编程架构-第19部分","authors":"J. Wright","doi":"10.1109/cicc.2004.1358837","DOIUrl":null,"url":null,"abstract":"Structured ASICs consist of a regular array of pre-designed logic elements that can be interconnected as needed to implement a user's circuit. The \"programming\" of these devices involves fabricating a small number of metal mask or via layers in a silicon foundry. Since most of the mask layers on the chip are the same for all designs, with only the final metal or via layers being customized for a particular circuit, manufacturing time, and risk, is decreased compared to traditional standard cell ASICs. Our first three papers examine design issues for structured ASICs.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"30 24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Prop-rammable architectures - Session 19\",\"authors\":\"J. Wright\",\"doi\":\"10.1109/cicc.2004.1358837\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Structured ASICs consist of a regular array of pre-designed logic elements that can be interconnected as needed to implement a user's circuit. The \\\"programming\\\" of these devices involves fabricating a small number of metal mask or via layers in a silicon foundry. Since most of the mask layers on the chip are the same for all designs, with only the final metal or via layers being customized for a particular circuit, manufacturing time, and risk, is decreased compared to traditional standard cell ASICs. Our first three papers examine design issues for structured ASICs.\",\"PeriodicalId\":407909,\"journal\":{\"name\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"volume\":\"30 24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/cicc.2004.1358837\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/cicc.2004.1358837","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

结构化asic由预先设计的逻辑元件组成，这些逻辑元件可以根据需要相互连接以实现用户的电路。这些设备的“编程”涉及在硅铸造厂制造少量金属掩膜或通过层。由于芯片上的大多数掩模层对于所有设计都是相同的，只有最终金属层或通孔层是为特定电路定制的，因此与传统的标准单元asic相比，制造时间和风险都降低了。我们的前三篇论文研究了结构化asic的设计问题。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Prop-rammable architectures - Session 19

Structured ASICs consist of a regular array of pre-designed logic elements that can be interconnected as needed to implement a user's circuit. The "programming" of these devices involves fabricating a small number of metal mask or via layers in a silicon foundry. Since most of the mask layers on the chip are the same for all designs, with only the final metal or via layers being customized for a particular circuit, manufacturing time, and risk, is decreased compared to traditional standard cell ASICs. Our first three papers examine design issues for structured ASICs.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)

自引率

0.00%

发文量