{"title":"Reed-Muller表示的多级最小化算法","authors":"J. Saul","doi":"10.1109/ICCD.1991.139990","DOIUrl":null,"url":null,"abstract":"There is interest currently in using Reed-Muller equations as a way of representing and manipulating switching functions, and as a means of designing circuits based on exclusive-OR gates. There are only two-level Reed-Muller minimizers in use, although the need for a multi-level minimizer has been identified. A procedure for multi-level Reed-Muller minimization has been developed. It introduces a Reed-Muller factored form and uses algebraic algorithms for factorization decomposition, resubstitution, collapsing, and extraction of common cubes and sub-expressions. The procedure has been implemented in C as a series of packages which have been added to MISII, and benchmark comparisons with minimal two-level representations are favorable.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":"{\"title\":\"An algorithm for the multi-level minimization of Reed-Muller representations\",\"authors\":\"J. Saul\",\"doi\":\"10.1109/ICCD.1991.139990\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"There is interest currently in using Reed-Muller equations as a way of representing and manipulating switching functions, and as a means of designing circuits based on exclusive-OR gates. There are only two-level Reed-Muller minimizers in use, although the need for a multi-level minimizer has been identified. A procedure for multi-level Reed-Muller minimization has been developed. It introduces a Reed-Muller factored form and uses algebraic algorithms for factorization decomposition, resubstitution, collapsing, and extraction of common cubes and sub-expressions. The procedure has been implemented in C as a series of packages which have been added to MISII, and benchmark comparisons with minimal two-level representations are favorable.<<ETX>>\",\"PeriodicalId\":239827,\"journal\":{\"name\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"25\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1991.139990\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139990","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An algorithm for the multi-level minimization of Reed-Muller representations
There is interest currently in using Reed-Muller equations as a way of representing and manipulating switching functions, and as a means of designing circuits based on exclusive-OR gates. There are only two-level Reed-Muller minimizers in use, although the need for a multi-level minimizer has been identified. A procedure for multi-level Reed-Muller minimization has been developed. It introduces a Reed-Muller factored form and uses algebraic algorithms for factorization decomposition, resubstitution, collapsing, and extraction of common cubes and sub-expressions. The procedure has been implemented in C as a series of packages which have been added to MISII, and benchmark comparisons with minimal two-level representations are favorable.<>