{"title":"电镀金的低成本静电驱动光学器件的开发","authors":"Amit Kumar, Prem Kumar, D. Bansal, K. Rangra","doi":"10.1109/INDICON.2014.7030605","DOIUrl":null,"url":null,"abstract":"This paper presents a low cost fabrication process for development of electrostatically actuated optical microstructures. To illustrate the process - a design, fabrication and measurement iteration for digital micromirror test structures is presented. The structures are fabricated on Single Crystal Silicon wafer using surface micromachining and gold electroplating. The major focus of the work has been on the process compatibility with conventional CMOS fabrication technology, lower cost, complexity, lower surface roughness and susceptibility of compliant structures to thermal cycling during the process. The structures consist of 1-2 micron thick micromirrors suspended at a height of 2-5 micron and surface roughness of 22-30 nm. Vertical deflection (3 micron), pull-in voltage (31V) and mechanical resonance frequency (25 KHz) match within 5-10% to the simulated design. The approach can be extended to realize optical switches, light modulators, grating structures, barcode readers and optical scanners.","PeriodicalId":409794,"journal":{"name":"2014 Annual IEEE India Conference (INDICON)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low cost process for development of electrostatically actuated optical devices using gold electroplating\",\"authors\":\"Amit Kumar, Prem Kumar, D. Bansal, K. Rangra\",\"doi\":\"10.1109/INDICON.2014.7030605\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low cost fabrication process for development of electrostatically actuated optical microstructures. To illustrate the process - a design, fabrication and measurement iteration for digital micromirror test structures is presented. The structures are fabricated on Single Crystal Silicon wafer using surface micromachining and gold electroplating. The major focus of the work has been on the process compatibility with conventional CMOS fabrication technology, lower cost, complexity, lower surface roughness and susceptibility of compliant structures to thermal cycling during the process. The structures consist of 1-2 micron thick micromirrors suspended at a height of 2-5 micron and surface roughness of 22-30 nm. Vertical deflection (3 micron), pull-in voltage (31V) and mechanical resonance frequency (25 KHz) match within 5-10% to the simulated design. The approach can be extended to realize optical switches, light modulators, grating structures, barcode readers and optical scanners.\",\"PeriodicalId\":409794,\"journal\":{\"name\":\"2014 Annual IEEE India Conference (INDICON)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Annual IEEE India Conference (INDICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INDICON.2014.7030605\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Annual IEEE India Conference (INDICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDICON.2014.7030605","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low cost process for development of electrostatically actuated optical devices using gold electroplating
This paper presents a low cost fabrication process for development of electrostatically actuated optical microstructures. To illustrate the process - a design, fabrication and measurement iteration for digital micromirror test structures is presented. The structures are fabricated on Single Crystal Silicon wafer using surface micromachining and gold electroplating. The major focus of the work has been on the process compatibility with conventional CMOS fabrication technology, lower cost, complexity, lower surface roughness and susceptibility of compliant structures to thermal cycling during the process. The structures consist of 1-2 micron thick micromirrors suspended at a height of 2-5 micron and surface roughness of 22-30 nm. Vertical deflection (3 micron), pull-in voltage (31V) and mechanical resonance frequency (25 KHz) match within 5-10% to the simulated design. The approach can be extended to realize optical switches, light modulators, grating structures, barcode readers and optical scanners.