一种新型低压低功耗SRAM电流模式检测放大器

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.722884

Jinn-Shyan Wang, Hong-Yu Lee

{"title":"一种新型低压低功耗SRAM电流模式检测放大器","authors":"Jinn-Shyan Wang, Hong-Yu Lee","doi":"10.1109/ASIC.1998.722884","DOIUrl":null,"url":null,"abstract":"A new current-mode sense amplifier is proposed and it can be used in the design of a low-voltage low-power SRAM for ASIC applications. In the new current-mode sense amplifier a modified current-conveyor is used to prevent the pattern dependent problem which is overlooked in the previous designs. Simulation results show the conventional circuits will fail and the new circuit can work if V/sub DD/=1.5 V and an industrial 0.35 /spl mu/m CMOS technology is used. Power consumption of the new circuit with V/sub DD/=1.5 V is only 6%/spl sim/39% of the conventional circuits running at V/sub DD/=2.0 V. A 128/spl times/8 SRAM using the new circuit for V/sub DD/=2.0 V in a 0.6 /spl mu/m CMOS technology is also designed and successfully applied in an 8-bit low-power microcontroller.","PeriodicalId":104431,"journal":{"name":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","volume":"291 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A new current-mode sense amplifier for low-voltage low-power SRAM\",\"authors\":\"Jinn-Shyan Wang, Hong-Yu Lee\",\"doi\":\"10.1109/ASIC.1998.722884\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new current-mode sense amplifier is proposed and it can be used in the design of a low-voltage low-power SRAM for ASIC applications. In the new current-mode sense amplifier a modified current-conveyor is used to prevent the pattern dependent problem which is overlooked in the previous designs. Simulation results show the conventional circuits will fail and the new circuit can work if V/sub DD/=1.5 V and an industrial 0.35 /spl mu/m CMOS technology is used. Power consumption of the new circuit with V/sub DD/=1.5 V is only 6%/spl sim/39% of the conventional circuits running at V/sub DD/=2.0 V. A 128/spl times/8 SRAM using the new circuit for V/sub DD/=2.0 V in a 0.6 /spl mu/m CMOS technology is also designed and successfully applied in an 8-bit low-power microcontroller.\",\"PeriodicalId\":104431,\"journal\":{\"name\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"volume\":\"291 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1998.722884\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1998.722884","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 24

摘要

提出了一种新的电流模式检测放大器，可用于ASIC应用的低压低功耗SRAM的设计。在新的电流模式检测放大器中，采用了一种改进的电流输送装置，以防止以往设计中忽略的模式依赖问题。仿真结果表明，当V/sub DD/=1.5 V，采用工业0.35 /spl mu/m CMOS技术时，传统电路失效，新电路可以正常工作。当V/sub DD/=1.5 V时，新电路的功耗仅为V/sub DD/=2.0 V时传统电路的6%/spl sim/39%。本文还设计了一个128/spl倍/8 SRAM，该SRAM采用0.6 /spl mu/m CMOS技术，V/sub DD/=2.0 V，并成功应用于8位低功耗微控制器中。

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A new current-mode sense amplifier for low-voltage low-power SRAM

A new current-mode sense amplifier is proposed and it can be used in the design of a low-voltage low-power SRAM for ASIC applications. In the new current-mode sense amplifier a modified current-conveyor is used to prevent the pattern dependent problem which is overlooked in the previous designs. Simulation results show the conventional circuits will fail and the new circuit can work if V/sub DD/=1.5 V and an industrial 0.35 /spl mu/m CMOS technology is used. Power consumption of the new circuit with V/sub DD/=1.5 V is only 6%/spl sim/39% of the conventional circuits running at V/sub DD/=2.0 V. A 128/spl times/8 SRAM using the new circuit for V/sub DD/=2.0 V in a 0.6 /spl mu/m CMOS technology is also designed and successfully applied in an 8-bit low-power microcontroller.

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来源期刊

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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