用于毫米波波束形成阵列的1.8 v -1.0 v CMOS 65nm MIPI RFFE接口电路

2019 21st International Conference on Advanced Communication Technology (ICACT) Pub Date : 2019-02-01 DOI:10.23919/ICACT.2019.8701901

Seunghyun Jang, Sunwoo Kong, Hui-Dong Lee, Jeehoon Park, Kwang-Seon Kim, Kwangchun Lee

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引用次数: 0

摘要

采用CMOS 65nm工艺作为毫米波波束形成阵列的控制块，设计了一种1.8V MIPI射频前端(RFFE)电路，用于1.0V电源的从机。它由MIPI RFFE从逻辑、上电复位(power-on-reset, PoR)、SCLK接收器和SDATA收发器组成，通过MIPI RFFE总线支持MIPI RFFE主从接口。仿真结果表明，所设计的MIPI RFFE接口电路在26 MHz的传输速率下，在26 pF负载(1主8从配置)下的上升和下降时间小于3.3 ns，满足MIPI RFFE规范1.10版本中6.5 ns的要求。

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1.8V-to-1.0V CMOS 65 nm MIPI RFFE Interface Circuit for Millimeter-wave Beamforming Array

A 1.8V MIPI RF front-end (RFFE) circuit for a slave with a 1.0V supply is designed using a CMOS 65 nm process as a control block for a millimeter-wave beamforming array. It is consisted of a MIPI RFFE slave logic, power-on-reset (PoR), SCLK receiver, and SDATA transceiver to support the MIPI RFFE master-slave interface with MIPI RFFE bus. According to simulation results, the designed MIPI RFFE interface circuit provides rise and fall time of less than 3.3 ns with a 26 pF load (one master-eight slave configuration) at the transmission rate of 26 MHz, satisfying the requirement of 6.5 ns in the MIPI RFFE specification version 1.10.

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2019 21st International Conference on Advanced Communication Technology (ICACT)

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