{"title":"一种用于相控阵接收器的65nm CMOS ka波段矢量和移相器","authors":"Haifeng Liu, Benqing Guo, Huifen Wang, Jingwei Wu","doi":"10.1109/ICECCE52056.2021.9514160","DOIUrl":null,"url":null,"abstract":"In this paper, a Ka-band vector-sum phase shifter with high quadrature precision I/Q signal generator and a new type of digitally controlled variable gain amplifier is presented. Specifically, the parasitic capacitance of the input common source stage of the I/Q signal generator is absorbed by an additional inductor in parallel resonance. In effect, the quadrature precision between the I/Q branch has been improved across the entire Ka-band. A variable gain amplifier based on digital control of transconductance was also proposed, which is equivalent to a cascode structure. The equivalent cascode transistor is composed of a 3x4 transistor array, and the transconductance of the overall circuit is adjustable by turning some of them on or off through programmable digital control signals. The proposed Ka-band vector-sum phase shifter is simulated with the TSMC 65nm CMOS process. It achieves an RMS phase error of 1.7°-2.2° and an RMS magnitude error of 0.9-2.1dB over 27-40GHz while covering a 360° phase range in steps less than 5.625°. The maximum DC power consumption is 8.9mW under 1.2V supply voltage, and the chip area is 0.399mm2.","PeriodicalId":302947,"journal":{"name":"2021 International Conference on Electrical, Communication, and Computer Engineering (ICECCE)","volume":"211 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Ka-band Vector-Sum Phase Shifter in 65nm CMOS for Phased Array Receivers\",\"authors\":\"Haifeng Liu, Benqing Guo, Huifen Wang, Jingwei Wu\",\"doi\":\"10.1109/ICECCE52056.2021.9514160\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a Ka-band vector-sum phase shifter with high quadrature precision I/Q signal generator and a new type of digitally controlled variable gain amplifier is presented. Specifically, the parasitic capacitance of the input common source stage of the I/Q signal generator is absorbed by an additional inductor in parallel resonance. In effect, the quadrature precision between the I/Q branch has been improved across the entire Ka-band. A variable gain amplifier based on digital control of transconductance was also proposed, which is equivalent to a cascode structure. The equivalent cascode transistor is composed of a 3x4 transistor array, and the transconductance of the overall circuit is adjustable by turning some of them on or off through programmable digital control signals. The proposed Ka-band vector-sum phase shifter is simulated with the TSMC 65nm CMOS process. It achieves an RMS phase error of 1.7°-2.2° and an RMS magnitude error of 0.9-2.1dB over 27-40GHz while covering a 360° phase range in steps less than 5.625°. The maximum DC power consumption is 8.9mW under 1.2V supply voltage, and the chip area is 0.399mm2.\",\"PeriodicalId\":302947,\"journal\":{\"name\":\"2021 International Conference on Electrical, Communication, and Computer Engineering (ICECCE)\",\"volume\":\"211 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on Electrical, Communication, and Computer Engineering (ICECCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECCE52056.2021.9514160\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Electrical, Communication, and Computer Engineering (ICECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECCE52056.2021.9514160","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Ka-band Vector-Sum Phase Shifter in 65nm CMOS for Phased Array Receivers
In this paper, a Ka-band vector-sum phase shifter with high quadrature precision I/Q signal generator and a new type of digitally controlled variable gain amplifier is presented. Specifically, the parasitic capacitance of the input common source stage of the I/Q signal generator is absorbed by an additional inductor in parallel resonance. In effect, the quadrature precision between the I/Q branch has been improved across the entire Ka-band. A variable gain amplifier based on digital control of transconductance was also proposed, which is equivalent to a cascode structure. The equivalent cascode transistor is composed of a 3x4 transistor array, and the transconductance of the overall circuit is adjustable by turning some of them on or off through programmable digital control signals. The proposed Ka-band vector-sum phase shifter is simulated with the TSMC 65nm CMOS process. It achieves an RMS phase error of 1.7°-2.2° and an RMS magnitude error of 0.9-2.1dB over 27-40GHz while covering a 360° phase range in steps less than 5.625°. The maximum DC power consumption is 8.9mW under 1.2V supply voltage, and the chip area is 0.399mm2.