自适应PAM-4 5gb /s背板收发器，0.25 /spl mu/m CMOS

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012844

J. Sonntag, J. Stonick, J. Gorecki, Bill Beale, Bill Check, Xue-Mei Gong, Joe Guiliano, K. Lee, Bob Lefferts, David A. Yokoyama-Martin, U. Moon, Amber Sengir, Steve Titus, Gu-Yeon Wei, D. Weinlader, Yaohua Yang

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引用次数: 41

摘要

本文描述了一种新型背板收发器，它使用PAM-4(脉冲幅度调制四电平)信号和基于连续自适应传输的均衡，通过两组背板连接器在典型的FR-4背板上移动5 Gcb/s(信道比特每秒)，总距离可达50英寸。本文重点介绍了均衡器和自适应算法的实现，并给出了测量结果。17mm /sup 2/器件采用0.25 /spl mu/m CMOS工艺，工作在2.5 V和3.3 V电源上，功耗为1.2 W。

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An adaptive PAM-4 5 Gb/s backplane transceiver in 0.25 /spl mu/m CMOS

This paper describes a novel backplane transceiver, which uses PAM-4 (pulse amplitude modulated four level) signalling and continuously adaptive transmit based equalization to move 5 Gcb/s (channel bits per second) across typical FR-4 backplanes for total distances of up to 50 inches through two sets of backplane connectors. The paper focuses on the implementation of the equalizer and the adaptation algorithms, and includes measured results. The 17 mm/sup 2/ device is implemented in a 0.25 /spl mu/m CMOS process, operates on 2.5 V and 3.3 V supplies and consumes 1.2 W.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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