最高80gbit /s的操作1:4解复用IC与InP HBTs

IEEE Compound Semiconductor Integrated Circuit Symposium, 2005. CSIC '05. Pub Date : 1900-01-01 DOI:10.1109/CSICS.2005.1531834

K. Sano, H. Fukuyama, K. Murata, K. Kurishima, N. Kashio, T. Enoki, H. Sugahara

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引用次数: 3

摘要

我们报告了一种1:4解复用器(DMX) IC的高达80 gbit /s的操作，其InP HBTs为f/sub T/=292 GHz, f/sub max/=308 GHz。该电路的特点是:1)采用多相时钟(MPC)架构，抑制了功耗的增加;2)集电极电流密度高，达到5.0 mA//spl mu/m/sup 2/，速度最快。为了在可用数据脉冲模式发生器(PPG)很少的情况下测量超过50 Gbit/s的IC，我们构建了两种类型的数据PPG，即纯电PPG (E-PPG)和光电子PPG (OE-PPG)。通过这些技术，我们成功地确认了1:4 DMX IC高达80 Gbit/s的运行速度。

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Up to 80-Gbit/s operations of 1:4 demultiplexer IC with InP HBTs

We report up to 80-Gbit/s operations of a 1:4 demultiplexer (DMX) IC with InP HBTs of f/sub T/=292 GHz, f/sub max/=308 GHz. The circuit features are 1) the multiphase clock (MPC) architecture to suppress the increase of the power consumption, and 2) the high collector current density of 5.0 mA//spl mu/m/sup 2/ for the fastest circuit blocks. To measure the IC at over 50 Gbit/s where available data pulse pattern generators (PPGs) are few, we constructed two-types of data PPGs, which were a purely electrical PPG (E-PPG) and an optoelectronic PPG (OE-PPG). With these technologies, we successfully confirmed the operations up to 80 Gbit/s for the 1:4 DMX IC.

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IEEE Compound Semiconductor Integrated Circuit Symposium, 2005. CSIC '05.

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