{"title":"先进移动设备的低功耗技术/电路联合开发","authors":"G. Yeap","doi":"10.1109/ICICDT.2010.5510260","DOIUrl":null,"url":null,"abstract":"Technology options at 45nm and 32/28nm have been optimized for various mobile device applications. Disposable high performance technology is introduced to satisfy both high speed and low power requirement of modern convergence mobile computing and communication device. Dual Core Oxide scheme using SiON/Poly gate stack was used in 45nm. Scaled SiON/Poly gate stack is sufficient for 32/28nm low power/low cost technology, while HK/MG gate stack with strong process induced stress option is needed for high performance technology.","PeriodicalId":187361,"journal":{"name":"2010 IEEE International Conference on Integrated Circuit Design and Technology","volume":"108 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low power technology/circuit co-development for advanced mobile devices\",\"authors\":\"G. Yeap\",\"doi\":\"10.1109/ICICDT.2010.5510260\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Technology options at 45nm and 32/28nm have been optimized for various mobile device applications. Disposable high performance technology is introduced to satisfy both high speed and low power requirement of modern convergence mobile computing and communication device. Dual Core Oxide scheme using SiON/Poly gate stack was used in 45nm. Scaled SiON/Poly gate stack is sufficient for 32/28nm low power/low cost technology, while HK/MG gate stack with strong process induced stress option is needed for high performance technology.\",\"PeriodicalId\":187361,\"journal\":{\"name\":\"2010 IEEE International Conference on Integrated Circuit Design and Technology\",\"volume\":\"108 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE International Conference on Integrated Circuit Design and Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2010.5510260\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Integrated Circuit Design and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2010.5510260","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low power technology/circuit co-development for advanced mobile devices
Technology options at 45nm and 32/28nm have been optimized for various mobile device applications. Disposable high performance technology is introduced to satisfy both high speed and low power requirement of modern convergence mobile computing and communication device. Dual Core Oxide scheme using SiON/Poly gate stack was used in 45nm. Scaled SiON/Poly gate stack is sufficient for 32/28nm low power/low cost technology, while HK/MG gate stack with strong process induced stress option is needed for high performance technology.
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