{"title":"以物理为导向的模型来量化动态噪声裕度[片内噪声]","authors":"T. Gemmeke, T. Noll","doi":"10.1109/ESSCIR.2004.1356719","DOIUrl":null,"url":null,"abstract":"The increase in on-chip noise has led to severe signal integrity problems in modern chip design. In a new approach, an analytical, physically motivated model is proposed which quantities the pulse transfer characteristic of a gate, aimed at quick circuit analysis. The accuracy of the model is validated in comparison with simulation results from a circuit simulator. Moreover, its application in a standard design flow is demonstrated. As the model is based on physical circuit parameters, it is also well suited for what-if analysis.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A physically oriented model to quantify the dynamic noise margin [on-chip noise]\",\"authors\":\"T. Gemmeke, T. Noll\",\"doi\":\"10.1109/ESSCIR.2004.1356719\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The increase in on-chip noise has led to severe signal integrity problems in modern chip design. In a new approach, an analytical, physically motivated model is proposed which quantities the pulse transfer characteristic of a gate, aimed at quick circuit analysis. The accuracy of the model is validated in comparison with simulation results from a circuit simulator. Moreover, its application in a standard design flow is demonstrated. As the model is based on physical circuit parameters, it is also well suited for what-if analysis.\",\"PeriodicalId\":294077,\"journal\":{\"name\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIR.2004.1356719\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIR.2004.1356719","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A physically oriented model to quantify the dynamic noise margin [on-chip noise]
The increase in on-chip noise has led to severe signal integrity problems in modern chip design. In a new approach, an analytical, physically motivated model is proposed which quantities the pulse transfer characteristic of a gate, aimed at quick circuit analysis. The accuracy of the model is validated in comparison with simulation results from a circuit simulator. Moreover, its application in a standard design flow is demonstrated. As the model is based on physical circuit parameters, it is also well suited for what-if analysis.
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