Low power OpenRISC processor with power gating, multi-VTH and multi-voltage techniques

This paper presents a method of power optimization, implemented on Open RISC processor, aimed at reducing dynamic and static power consumption. Multi-voltage design method is one of the effective power reduction methods, implemented by dividing circuit into separate power domains based on their power/performance requirements. Multi-voltage will combination with multi-threshold and power gating techniques to significantly decrease both dynamic and leakage power of processor. Each domain then is supplied by separate power and ground rail.