采用集成低噪声放大器和超再生振荡器的8-PSK接收机,并采用数字检测技术

M. Wagdy, S. S. Rao, K. Singh, G. H. Ibrahim
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引用次数: 4

摘要

提出了一种以超再生振荡器(SRO)为前端的接收机解调8-PSK调制信号的仿真方法。该电路包括一个低噪声放大器(LNA)与SRO相结合,用于电流重用,工作在402-405 MHz MICS频段。解调是利用接收机前端(LNA & SRO)再生的信号的相位内容完成的。该解调无需将输入的射频信号下变频到中频频段,从而消除了本振(LO)、锁相环(PLL)或模数转换器(ADC)的使用。采用0.12 μm CMOS技术的接收机的完整设计和预布局仿真验证了8-PSK信号的正确和有效解调。当输入为- 80dbm,速率为4Mbps时,功耗约为175 μW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An 8-PSK receiver using an integrated low-noise amplifier & super-regenerative oscillator with digital detection technique
Simulations of a receiver using a Super-Regenerative Oscillator (SRO) as a front end, to demodulate 8-PSK Modulated Signals, is presented. The circuit involves a Low Noise Amplifier (LNA) combined with the SRO, for the purpose of current reuse, operating in 402-405 MHz MICS band. Demodulation is done utilizing the phase content of the signal that has been regenerated by the front-end of the receiver (LNA & SRO). The demodulation is achieved without downconverting incoming RF signal into IF band which eliminates the use of a Local Oscillator (LO), a Phase Locked Loop (PLL) or an Analog-to-Digital Converter (ADC). The complete design of the receiver made use of 0.12 μm CMOS technology and pre-layout simulations confirm proper and efficient demodulation of 8-PSK signals. The power consumption of around 175 μW is measured for an input of -80 dBm at a rate of 4Mbps.
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